AMD X670E and B650E Chipsets

AMD took a unique approach to chipsets with this generation. The top-tier chipset now comes in two flavors, X670E and X670. Both are identical in downstream I/O, but the X670E offers PCIe Gen 5 PEG besides CPU-attached Gen 5 NVMe; whereas the X670 only offers Gen 5 on the CPU-attached M.2 NVMe slot, but not PEG (which is Gen 4). A similar approach is taken when segregating the mid-tier B650E from the B650. The lack of Gen 5 PEG should significantly reduce motherboard costs as designers would be saving on Gen 5 redrivers and its steep wiring requirements to avoid signal-corruption.

X670E is a 2-chip chipset unlike the previous-gen X570. This was done to increase the downstream PCIe connectivity. The chipset now offers up to 12x PCIe Gen 4 and up to 8x PCIe Gen 3 downstream lanes (not counting the lanes from the CPU). This lets motherboard designers wire out three additional M.2 Gen 4 slots attached to the chipset, while the Gen 3 lanes handle low-bandwidth onboard devices. AMD adopted a wacky way to connect the two bridges that make up the chipset. There is an "upstream" chipset that's wired to the AM5 SoC over a PCI-Express 4.0 x4 connection; the second bridge is called "downstream" chipset, and is connected four of the PCIe Gen 4 downstream lanes of the "upstream" chipset. The X670/E puts out up to two 20 Gbps USB 3.2, up to eight 10 Gbps USB 3.2, and twelve USB 2.0. The B650E and B650 look like a more reasonable single-chip chipset. It talks to the SoC over PCI-Express 4.0 x4, and wires out 8x PCIe Gen 4 downstream lanes, and up to 4x PCIe Gen 3 downstream lanes. You get half the number of USB SuperSpeed ports as the X670/E.

AMD EXPO Memory

With Ryzen 7000 series, AMD is introducing EXPO (extended profiles for overclocking); a feature that's identical in concept to Intel XMP. AMD EXPO-certified DDR5 modules come with an easy method of applying the advertised memory speeds and timings—you simply select a toggle in the opening screen of your motherboard's UEFI BIOS program. EXPO differs from XMP in that it includes fine settings that are unique to the AMD architecture, and it's also an open standard. Until now, XMP modules installed on AMD systems relied either on painstaking manual overclocking, or use of DOCP, a feature that attempts to translate the settings in the XMP profile to "nearest neighbors" of AMD-compatible settings. This was sub-optimal. EXPO is royalty-free compared to XMP, so any memory manufacturer can implement it for free. Ryzen 7000 can run any PC-DDR5 memory in the market, including XMP-certified ones, so don't fret if you can't find EXPO kits just yet.

Socket AM5

Here are a few pictures of Socket AM5, the star-attraction with this platform. This is a land-grid array (LGA) socket with 1,718 pins.


As with every LGA socket, the pins are on the motherboard, whereas the processor package has contacts that interface with those pins, while a retention brace holds the package in place with a locking lever. Installing a processor on AM5 is similar to doing so on any of the dozens on Intel LGA sockets.


On Socket AM4, removing the four mounting screws resulted in the backplate falling off, which meant you needed three hands when installing a cooler, and several vendors also bundled their own backplates. On Socket AM5 the backplate isn't designed to be removed, which makes cooler installation MUCH easier.


The caps for the socket are not identical to the Intel LGA sockets, so you can't reuse them.

DDR5 Memory

Ryzen 7000 isn't the first platform to introduce DDR5, that was done last year with Intel 12th Gen Core "Alder Lake." Unlike the Intel chip, Ryzen 7000 is a DDR5-only processor. So you'll not come across motherboards with DDR4 slots, and will need to buy new memory. DDR5 generationally doubles the data transfer-rates over DDR4, operates at lower voltages, comes with intrinsic ECC which Ryzen 7000 supports at a silicon-level, and is optimized for parallelism, since each 80-bit memory channel contains two 40-bit sub-channels (independent paths to the memory controller).