Join us for the PCI-SIG Developers Conference in Santa Clara, CA and see demos of the latest Rambus PCI Express (PCIe ) 6.0 IP solutions, including 64 Gigatransfers per second (GT/s) PCIe 6.0 PHY and Controller IP. With leading PPA, these 64 GT/s products achieve high performance, low power and area-efficient footprint for compute-intensive workloads including data center, AI/ML and HPC applications.

The Rambus PCIe 6.0 Interface Subsystem comprising PHY and Controller has been fully optimized to meet the needs of advanced heterogenous computing architectures. The PCIe Controller features an Integrity and Data Encryption (IDE) engine dedicated to protecting the PCIe links and the valuable data transferred over them. The PCIe 6.0 PHY features state-of-the-art SI/PI performance to provide best-in-class design margin for first-time-right implementations.Visit Rambus at booth #8 to see a hardware demonstration of these leading-edge PCIe 6.0 Interface IP solutions. For additional information on Rambus PCIe 6.0 IP, please visit this page.