Online hardware communities continue to discuss the 12VHPWR connection standard's troubled existence, while revised technology gets worked on—quietly—in the background. PCI-SIG's 12V-2x6 connector was first revealed last summer, signalling an alternative power delivery method for high-wattage graphics cards. Past TPU reports show that the 12V-2x6 16-pin design has already popped up on select NVIDIA Founders Edition cards, GeForce RTX 40 SUPER custom graphics card designs, and various new generation power supplies. Earlier today, Алексей (AKA wxnod) took to social media and posted an image of the freshly deshrouded "H++" 12V-2x6 (total design limit: 675 W) socket, as well as a shot of the familiar "H+" 12VHPWR (max. 600 W).

This fifth generation socket design largely rolled out with Team Green's GeForce RTX-40 SUPER card series, although wxnod notes that exceptions do exist: "Some AIC GeForce RTX 4070 SUPER, 4070 Ti SUPER and 4080 SUPER cards are still using the H+12VHPWR interface." The H++ identified 12V-2x6 design's power limit peaks at 675 W—a technical breakdown from last July revealed that 75 W comes from the expansion slot, while the big 600 W portion flows through the 16-pin connector. As mentioned before, 12V-2x6 debuted on a few Non-SUPER cards back in 2023, but last month's SUPER series product launch marked a more comprehensive rollout. AMD has indicated that it is considering an adoption of Gen 5 H++ in the future, but we have not heard much on that subject since last August. A new generation 16-pin PCIe 6.0 power connector design was linked to the upcoming NVIDIA RTX 50-series of "Blackwell" GPUs, but Hardware Busters has refuted rumors generated by Moore's Law is Dead. Team Green is expected to remain faithful to "H++" 12V-2x6 with the launch of next generation graphics cards.

Officially, support for resizable BAR on the Intel platform begins with the 10th Gen Core "Comet Lake," and for AMD, the Ryzen 3000 "Zen 2." It is a PCI-SIG feature that allows the software to see the entire amount of video memory on your graphics card as a single contiguous addressable block, rather than through 256 MB apertures—a workaround for the original PCI Express specification as the industry was transitioning to it from AGP. The PCI-SIG had introduced resizable BAR way back during the PCI-Express 2.0 specification (late 2000s), although none of the GPU or platform vendors of the time bothered to implement it. Resizable BAR is known to have a positive impact on performance for modern GPUs from NVIDIA and AMD; although its most profound performance impact is on the Intel Arc "Alchemist" GPUs, which suffer a large performance penalty without it.

ReBarUEFI by xCuri0 is a UEFI DXE driver mod, which requires you to know how to modify the UEFI firmware of your motherboard. The ReBarUEFI mod calls for a motherboard that implements UEFI, the older legacy BIOS won't do. The industry transitioned to UEFI in the early 2010s, roughly around the time of Intel "Sandy Bridge." UEFI DXE drivers provide basic support for the various hardware on your system. The ReBarUEFI driver informs software that the platform is capable of resizable BAR. Some motherboards may require you to enable the "Above 4G Decode" setting. The author claims that users on platforms as old as 2nd Gen Core "Sandy Bridge" have had success in getting resizable BAR to work.

Alphawave Semi (LSE: AWE), a global leader in high-speed connectivity for the world's technology infrastructure, today announced successful collaboration with Keysight Technologies, a market-leading design, emulation, and test solutions provider, demonstrating interoperability between Alphawave Semi's PCIe 6.0 64 GT/s Subsystem (PHY and Controller) Device and Keysight PCIe 6.0 64 GT/s Protocol Exerciser, negotiating a link to the maximum PCIe 6.0 data rate. Alphawave Semi, already on the PCI-SIG 5.0 Integrators list, is accelerating next-generation PCIe 6.0 Compliance Testing through this collaboration.

Alphawave Semi's leading-edge silicon implementation of the new PCIe 6.0 64 GT/s Flow Control Unit (FLIT)-based protocol enables higher data rates for hyperscale and data infrastructure applications. Keysight and Alphawave Semi achieved another milestone by successfully establishing a CXL 2.0 link setting the stage for future cache coherency in the datacenter.

KIOXIA America, Inc. today announced that its CM7 Series and CD8P Series NVM Express (NVMe) SSDs have passed certification testing for PCI Express (PCIe) 5.0 specification and NVMe 2.0 specification compliance. Developed by PCI-SIG, the PCIe 5.0 interface specification is an upgrade that enables twice the data transfer speed and bandwidth versus the PCIe 4.0 specification - up to 14,000 Megabyte/s read throughput for a x4 lane SSD. PCIe 5.0 tests were conducted at PCI-SIG compliance workshops against PCI-SIG maintained systems, along with other leading manufacturers of PCIe products.

KIOXIA CM7 Series and CD8P Series drives can now be found on the PCI-SIG Integrator's List. Achieving compliance certification during these workshops assures users that KIOXIA drives meet the rigorous PCIe 5.0 specification requirements. KIOXIA CM7 Series and CD8P Series drives have been added to The University of New Hampshire InterOperability Laboratory's (UNH-IOL) official Integrator's List. In order to be considered for inclusion on the list, technologies must undergo conformance testing performed by the UNH-IOL through laboratory tests or during an NVMe plugfest. Successful completion of this testing provides a level of assurance that the product being tested will function properly in NVMe enabled systems and NVM Express over Fabrics (NVMe-oF) environments.

Phison Electronics, a global leader in NAND controllers and storage solutions, announced today that the company has expanded its portfolio of PCIe 5.0 high-speed transmission solutions with PCIe 5.0, CXL 2.0 compatible redriver and retimer data signal conditioning IC products. Leveraging the company's deep expertise in PCIe engineering, Phison is the only signal conditioners provider that offers the widest portfolio of multi-channel PCIe 5.0 redriver and retimer solutions and PCIe 5.0 storage solutions designed specifically to meet the data infrastructure demands of artificial intelligence and machine learning (AI+ML), edge computing, high-performance computing, and other data-intensive, next-gen applications. At the 2023 Open Compute Project Global Summit, the Phison team is showcasing its expansive PCIe 5.0 portfolio, demonstrating the redriver and retimer technologies alongside other enterprise NAND flash, illustrating a holistic vision for a PCIe 5.0 data ecosystem to address the most demanding applications of the AI-everywhere era.

"Phison has focused industry-leading R&D efforts on developing in-house, chip-to-chip communication technologies since the introduction of the PCIe 3.0 protocol, with PCIe 4.0 and PCIe 5.0 solutions now in mass production, and PCIe 6.0 solutions now in the design phase," said Michael Wu, President & General Manager, Phison US. "Phison's accumulated experience in high-speed signaling enables our team to deliver retimer and redriver design solutions that are optimized for top signal integration, low power usage, and high temperature endurance, to deliver interface speeds for the most challenging compute environments."

FSP has declared that it intends to update its entire 2023 PSU product lineup to include the latest "12V-2x6" power connector (part of the ATX 3.0 standard)—harukaze5719 posted about this development earlier today, citing a Quasarzone article. We heard mid-summer about PCI-SIG plowing ahead on an all-new ATX 3.0 connector to replace the 16-pin (12+4) 12VHPWR plug. They hope to introduce some key improvements with their new design, mainly in the areas of ease-of-use and safety.

TPU staffers had hands-on time with FSP's 2023 PSU product line at their Computex 2023 booth, showcased units were equipped with 16-pin 12VHPWR (at the time). Quasarzone's report (covering a recent press conference) has the following FSP power supply families listed with updates to the new "12V-2x6" standard: Hydro G PRO 1200 W ATX 3.0, Hydro PTM X PRO ATX 3.0 and Dagger PRO ATX 3.0.

PCI-SIG today announced the formation of a new workgroup to deliver PCI Express (PCIe) technology over optical connections. The PCI-SIG Optical Workgroup intends to be optical technology-agnostic, supporting a wide range of optical technologies, while potentially developing technology-specific form factors.

"Optical connections will be an important advancement for PCIe architecture as they will allow for higher performance, lower power consumption, extended reach and reduced latency," said Nathan Brookwood, Research Fellow at Insight 64. "Many data-demanding markets and applications such as Cloud and Quantum Computing, Hyperscale Data Centers and High-Performance Computing will benefit from PCIe architecture leveraging optical connections."

A few days ago, we reported that NVIDIA and PCI-SIG have been doing some work around the existing controversial 12VHPWR power connector to make some improvements and prevent issues that happened along the way. Called 12V-2x6, the connector features minor revisions, and you can read more about it here. Today, we learn that NVIDIA has already been shipping implementations of the new 12V-2x6 connector in GeForce RTX 4070 graphics cards, confirmed by Igor's Lab. Majority of RTX 4070 cards from AIBs shipped with 8-pin PCI connector; however, it turns out that cards that didn't use the reference 12-pin connection carried a new 12V-2x6 revision.

Below, you can see the picture comparison with the connectors from the Founders Edition of GeForce RTX 4070 and RTX 4080. The new connector on the RTX 4070 has shorter sensing pins, which can detect whether the connector is fully plugged in. If not plugged all the way, the card will not draw the required maximum power load. This should, in theory, solve connector burning issues happening in the past; however, we are still left to see. In addition, we are not sure if this is the final implementation of the new connector, as the labeling refferest to it as "H+", whereas the new connector should carry the label "H++" on its module. Igor's Lab article notes, "Since the GeForce RTX 4070 FE, NVIDIA has already been using a modified 12VHPWR connector with significantly recessed pins! While the GeForce RTX 4080 Founders Edition still relies on the header from the CEM 5.0 with only 0.45 mm offset, the GeForce RTX 4070 Founders Edition has been using a modified variant with 1.7 mm inward offset since its launch, similar to the 12V-2x6 connector."

According to Igor's Lab, who has gotten their hands on a PCI-SIG draft engineer change notice, it looks like the not entirely uncontroversial 12VHPWR connector won't be long lived. The PCI-SIG is getting ready to replace it with the 12V-2x6 connector, which will be part of the ATX 3.1 spec and the PCI Express 6.0 spec. The new connector doesn't appear to have any major physical changes though, but there have been mechanical modifications, such as the sense pins having been recessed further back, to make sure a proper contact is made before higher power outputs can be requested by the GPU. The good news is that at least in the draft spec, the 12V-2x6 connector will be backwards compatible with 12VHPWR connectors.

One of the bigger changes, at least when it comes to how much power the new connector can deliver, is that there will be new 150 and 300 Watt modes in addition to the 450 and 600 Watt modes for the sense pin detection. The 12V-2x6 connector is rated for at least 9.2 Amps per pin and the new connectors will carry a H++ logo, with th older 12VHPWR connectors getting a H+ logo. The PCI-SIG has also added stricter requirements when it comes to the cable design and quality, which should hopefully prevent some of the issues the 12VHPWR implementations have suffered from. We should find out more details once the PCI-SIG has finalised the 12V-2x6 connector specification. In the meantime, you can hit up the source link for more technical drawings and details.

It appears that Western Digital is getting ready to expand its budget line of WD Blue SSDs with yet another model, this time a smaller jump from the SN570 to the SN580, compared to the jump in model numbers from the SN550 to the SN570. The drive has passed through the PCI-SIG integrators list and from that information we only know it's a PCIe 4.0 NVMe drive with a four lane interface. However, some retailers have already put up the drive for pre-order and this helps us with a few more details.

For starters, it appears that we're once again looking at drives in the 500 GB to the 2 TB range, although this doesn't mean that WD couldn't launch a 4 TB variant as well, but it seems unlikely. What we also learnt is that these product pages are place holders, as the drives are listed for the same, or higher pricing than the WD Black SN850X, which makes no sense for a budget drive which should be closer to the US$100/€100 mark than the equivalent of twice that. Another European retailer is also listing the current SN570 as being EOL:ed on the 31st of July, suggesting that the SN580 should launch around that date. The same retailer is listing the SN580 as the replacement drive under its part number, which is WDS200T3B0E for the 2 TB SKU.

PCI-SIG is pleased to share the PCI Express (PCIe) 7.0 specification, version 0.3 is now available to members. Version 0.3 of the specification indicates that the first review draft of the specification is complete and has received work group approval. This is an important milestone for PCI-SIG, demonstrating we are on plan for a full specification release in 2025.

The PCIe 7.0 specification is targeted to support emerging applications such as 800 G Ethernet, AI/ML, Cloud and Quantum Computing; and data-intensive markets like Hyperscale Data Centers, High-Performance Computing (HPC), Edge and Military/Aerospace.

Join us for the PCI-SIG Developers Conference in Santa Clara, CA and see demos of the latest Rambus PCI Express (PCIe ) 6.0 IP solutions, including 64 Gigatransfers per second (GT/s) PCIe 6.0 PHY and Controller IP. With leading PPA, these 64 GT/s products achieve high performance, low power and area-efficient footprint for compute-intensive workloads including data center, AI/ML and HPC applications.

The Rambus PCIe 6.0 Interface Subsystem comprising PHY and Controller has been fully optimized to meet the needs of advanced heterogenous computing architectures. The PCIe Controller features an Integrity and Data Encryption (IDE) engine dedicated to protecting the PCIe links and the valuable data transferred over them. The PCIe 6.0 PHY features state-of-the-art SI/PI performance to provide best-in-class design margin for first-time-right implementations.

Achronix Semiconductor Corporation, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, today announced that its VectorPath accelerator card featuring a Speedster 7t FPGA has been certified by PCI-SIG for PCIe Gen 5 and is the first and only FPGA accelerated CEM add-in card certified for PCIe Gen 5 x16 at 32 gigatransfers per second (GT/s) on the PCI-SIG Integrator's list. VectorPath S7t-VG6 accelerator cards are designed to reduce time to market when developing high-performance compute and acceleration functions for AI, ML, networking and data center applications and are shipping today.

"Achronix continues to drive acceleration in the high-performance FPGA add-in card market," said Craig Petrie, Vice President at BittWare. "Achieving PCI-SIG Gen 5 certification is an important milestone. Our customers can be assured of the highest PCIe bandwidths and have confidence that VectorPath cards will interoperate with Gen 5 servers."

Montage Technology, a leading data processing and interconnect IC design company, announced today that its PCIe 5.0/CXL 2.0 Retimer has successfully achieved mass production. This chip is a key upgrade based on Montage's PCIe 4.0 Retimer, providing a stable and reliable PCIe 5.0 and CXL 2.0 interconnect solution with high bandwidth and low latency for the cloud and high-performance computing market.

Montage's PCIe 5.0/CXL 2.0 Retimer employs advanced signal conditioning technologies to improve signal integrity and increase the effective transmission distance of high-speed signals. Compliant with relevant PCI-SIG and CXL specifications, the chip meets mainstream package requirements, supports transfer rate up to 32 GT/s, and takes the lead in supporting ultra-low transmission latency of less than 5 ns. The chip supports various complex system topologies such as SRIS and Retimer cascading, offering an ideal solution to address the PCIe/CXL signal integrity challenges in next-generation servers, enterprise storage, and AI acceleration systems. The PCIe 5.0/CXL 2.0 Retimer has passed extensive interoperability testing with a variety of compute, storage and networking products, such as CPU, PCIe switches, SSDs, GPUs and NICs, thus laying a solid foundation for the large-scale deployment of cloud computing and data centers.

Phison Electronics Corp., a global leader in NAND flash controller and storage solutions, today is demonstrating the company's latest PCIe Gen5 innovation that is transcending system-level performance to new heights at CES in Las Vegas. Phison is demonstrating the E26 with Phison's proprietary I/O+ Technology to usher a new evolution of gaming experiences. For enterprise, Phison is previewing the company's latest Gen5 X Series SSD enterprise controllers, which can provide twice the performance per watt (in comparison to X1, the previous generation). Following the success of the world's first PCI-SIG Association certified PCIe 5.0 Redriver PS7101, Phison is also introducing the PS7201 Retimer with industry-proven IP. Phison's Retimer is designed to solve performance and data integrity issues in enterprise and automotive applications and further enhances the Gen5 ecosystem.

"Phison is ecstatic to be ringing in the new year by showcasing our product milestones for the industry, our partners and enterprise customers because we are committed and dedicated to engineering next generation technologies through ecosystem excellence," said Michael Wu, GM & President of Phison Technology Inc. (USA). "As a proven category leader, Phison's E26 with I/O+ Technology, latest Enterprise PCIe Gen5 X Series, signal enhancing Redriver and Retimer are product breakthroughs that are a testament to our engineering success."

Achronix Semiconductor Corporation, a leader in high-performance FPGAs and embedded FPGA (eFPGA) IP, today announced that their VectorPath accelerator card featuring the Speedster 7t FPGA has been certified by PCI-SIG and added to the CEM Add-In card integrators list supporting PCIe Gen4 x16. The VectorPath S7t-VG6 accelerator card is designed to reduce time to market when developing high-performance compute and acceleration functions for AI, ML, networking and data center applications. The VectorPath accelerator cards are available and shipping today for new orders.

"Achronix is an important, strategic partner for BittWare. The Speedster7t FPGA has an innovative architecture that provides significant differentiation in the high-performance FPGA market segment," said Craig Petrie, VP of sales and marketing at BittWare. "Designers can now use the VectorPath accelerator card in PCIe Gen4-based system with the confidence of PCI-SIG certification."

When testing recent high-end GPU launches such as the AMD Radeon RX 6950 XT graphics card, we observed some system reboots that caused due to power-draw spikes (technically known as "excursions"). This is when a graphics card, for a brief moment, draws more power than the connector is capable of supplying, triggering the PSU's electrical protections, and causing a reboot. The new ATX 3.0 specification for the next-generation of desktop PC power supplies enable PSUs with a high tolerance for excursions, and prescribes testing standards to ensure a PSU meets the ATX 3.0 spec. Aris Mpitziopoulos (crmaris) and Jon Gerow (Jonnyguru) discovered wording in the latest Intel ATX 3.0 specification that could make you pay closer attention to reviews of ATX 3.0-spec PSU, when they're out.

In a Hardware Busters article, Mpitziopoulos clears the confusion that the ATX 3.0 power supply specs by Intel and the PCI-Express 5.0 power specification by the PCI-SIG, are mutually-inclusive—they're not. An ATX 3.0 PSU is not required to include a 12+4 pin (or 16-pin) ATX 12VHPWR connector, whether or not their nameplate Wattage is above 450 W, which means it's subjected to passing less stressful transient-response tests, particularly the ability to deal with a 200% excursion for at least 100 µs.

The upcoming Samsung 990 PRO flagship consumer SSD has recently been listed as PCIe 5.0 compliant by PCI-SIG with the entry also confirming the drive's name and M.2 interface. The upgrade to PCIe 5.0 from 4.0 doubles the available bandwidth for the card with Samsung's existing enterprise PCIe 5.0 drives reaching speeds of 13,000 MB/s significantly above the 7000 MB/s of the best PCIe 4.0 drives. The latest Intel Alder Lake systems can support PCIe 5.0 drives on select motherboards with AMD support set to arrive with the launch of Ryzen 7000 and X670/B650 motherboards. Samsung is expected to release at least 1 TB and 2 TB variants of the drive however other details such as the exact length of the card and the controller used are currently unknown.

MSI welcomes the MEG Ai1300P PCIE5 power supply unit, the world's first power supply unit to be fully ready for ATX 3.0 and PCIe 5.0. With graphics cards becoming all the more important, users must know what components to buy for their system if they are looking to upgrade. To understand why the MEG Ai1300P PCIE5 is the ultimate future-proof power supply unit, let's begin with understanding ATX 3.0.

ATX 3.0 is Intel's new specification standard for existing PSUs. In short, ATX 3.0's main purpose is to help provide more reliability, and better power efficiency and provide graphics cards up to 600 watts of power. ATX 3.0 is created in response to graphics cards' increase in performance and the ever-increasing need for power. ATX 3.0 puts heavy emphasis on power excursions to make sure high-performance graphics cards can be sustained and your system can remain stable. Thanks to ATX 3.0 there is now an increase in efficiency while idling and a new power connector is added to help achieve all the above. ATX 3.0 added a new PCIe 5.0 12VHPWR connector that features 12+4 pins instead of the traditional 6 or 8. With the new PCIe 5.0 connector, the power supply and cable can supply up to 600 watts of power.

PCI-SIG today announced that the PCI Express (PCIe ) 7.0 specification will double the data rate to 128 GT/s and is targeted for release to members in 2025. "For 30 years the guiding principle of PCI-SIG has been, 'If we build it, they will come,'" observed Nathan Brookwood, Research Fellow at Insight 64. "Early parallel versions of PCI technology accommodated speeds of hundreds of megabytes/second, well matched to the graphics, storage and networking demands of the 1990s.

In 2003, PCI-SIG evolved to a serial design that supported speeds of gigabytes/second to accommodate faster solid-state disks and 100MbE Ethernet. Almost like clockwork, PCI-SIG has doubled PCIe specification bandwidth every three years to meet the challenges of emerging applications and markets. Today's announcement of PCI-SIG's plan to double the channel's speed to 512 GB/s (bi-directionally) puts it on track to double PCIe specification performance for another 3-year cycle."

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that its PHY and Controller IP for the PCI Express (PCIe ) 5.0 specification in the TSMC N7, N6 and N5 process technologies have passed certification tests from PCI-SIG at the industry's first event for PCIe 5.0 specification compliance held in April. The Cadence solutions were tested to their full potential and complied with the full speed of 32GT/s for PCIe 5.0 technology. The compliance program provides designers with testing procedures to assess that the PCIe 5.0 interfaces on their system-on-chip (SoC) designs will operate as expected.

The Cadence IP for PCIe 5.0 technology consists of a PHY, companion controller and Verification IP (VIP) targeted at SoC designs for very high-bandwidth hyperscale computing, networking and storage applications. With Cadence's PHY and Controller Subsystem for PCIe 5.0 architecture, customers can design extremely power-efficient SoCs while accelerating time to market.

NVMe SSDs based on the M.2 form factor come in several different lengths today, ranging from 30 to 110 mm, although the 30 mm drives are rare and the 110 mm drives have so far been reserved for the server space. However, they've all had one thing in common, the 22 mm width, as otherwise there might be issues in terms of fitting the drives, especially in notebooks. However, it appears that the PCI-SIG snuck in a wider, 25 mm option for M.2 SDDs at the end of 2020, but seemingly forgot to mention it to anyone. The only reason we even noticed, was because Gigabyte listed its upcoming X670 and X670E motherboards as having support for 25110 SSD's, where you'd expect to see support for 2280 or 22110 drives.

An extra 3 mm in width might not sound like much, but many M.2 drives seem to be somewhat space constrained, mainly with regards to the passive components and the power regulation. It also seems like this is in preparation for PCIe 5.0 NVMe drives, where the host controller is expected to run hotter, even though it might not be as bad as initially expected. Regardless, it seems like motherboard makers are now making space for this slightly wider M.2 form factor, as well as implementing suitable cooling solutions to match. Whether we'll see drives using this slightly wider form factor or not, is still up in the air and one reason why the SSD manufacturers might choose not to go wider, is because new drives might not fit in older motherboards and laptops, if the clearance is too small.

Phison Electronics Corp., a leading provider of NAND controller and flash storage solutions, announced today a strategic collaboration with AMD and Micron to build a cooperative PCIe Gen5 ecosystem of compatible products that elevate the gaming and creator experience. Phison's role includes delivering a class-leading PCie Gen5 SSD controller - PS5026-E26 - that features nearly a 2x performance increase over the previous generation flagship while adhering to the same power limitations of the M.2 form factor.

"We are pleased to announce our cooperative effort with Micron and AMD to advance the technological development of PCIe Gen5 storage offerings, as this validates Phison's commitment to upholding customer-centric values," said Leo Huang, Sr. Director, Product Marketing, Phison. "The E26 controller enables gamers to compete at the highest level and helps content creators to maximize the overall system performance to increase productivity." The need for high-speed storage has increased with the popularity of 5G Wireless availability worldwide. Global markets including desktop PC, notebooks, gaming consoles, cloud servers and even mobile devices will benefit from increased data transfer rates and the bandwidth available for multitask purposes. The ecosystem consisting of AMD's AM5 platform, Phison's PS5026-E26 controller, Micron's DDR5 DRAM and Replacement Gate 3D NAND allow for platform acceleration across the entire system to meet the requirements for today's always-connected lifestyle.

Phison Electronics Corp., a leading provider of NAND controller and NAND storage solutions integration services, announced today that it is successfully deploying the world's first PCIe 5.0 Redriver IC PS7101 certified by the PCI-SIG Association to help solve the compatibility problems of high-speed signal transmission between CPU (Central Processing Unit) and peripheral devices (such as SSD and graphics card, etc.). In the generation of PCIe 5.0 high-speed transmission, Redriver ICs will be required in devices such as desktop computers, servers, industrial computers, cables, and notebook computers. Depending on the degree of signal attenuation and the number of compensation channels, each system device will require 2 to 16 Redriver ICs. According to market research agencies, high-speed transmission signal enhancement ICs (including Redriver and Retimer ICs) will reach a market size of 50 million per year in 2025.

With the vigorous development of massive data, artificial intelligence, and cloud computing, demand for high-speed data transmission continues to rise. The CPU is the core of high-speed signal transmission. Under the leadership of CPU chip suppliers such as Intel and AMD, the transmission interface of the system has ushered the PCIe 5.0 generation, and the single-lane transmission speed reaching 32 Gbps per second, which is twice that of the previous generation PCIe 4.0. However, in the high-speed transmission environment of PCIe 5.0, compatibility issues such as signal attenuation and noise effects on the motherboard have become common problems and challenges faced by all system integrators.

Keysight Technologies, Inc., a leading technology company that delivers advanced design and validation solutions to help accelerate innovation to connect and secure the world, announced an end-to-end PCIe test solution for digital development and senior engineers that enable the simulation, pathfinding, characterization, validation and compliance testing of PCIe designs. The rapid increase of AI (artificial intelligence) related workloads in data centers and edge computing demand new compute designs. Data center system designers are challenged to provide new higher speed devices within reduced design cycles. New PCIe devices will need to keep up with Ethernet network interfaces in data centers and the emergence of CXL (compute express link).

To maintain performance goals and prepare for the PCIe 6.0 move to pulse amplitude modulation 4-level (PAM4), customers need a smooth transition from PCIe 5.0 to 6.0, where the integrity of PCIe measurements are backed by leading-edge tools and comply with PCIe specifications. With shrinking design cycles, end-to-end solutions from simulation to validation through the layers of the stack are required. Keysight provides a comprehensive physical layer test solution, approved by the Peripheral Component Interconnect Special Interest Group (PCI-SIG) to test transmitters and receivers for all generations of the PCIe specification, which is currently supported by the PCI-SIG integrators list. To reflect the increasing time to market pressure for design engineers, Keysight extends the portfolio to cover PCIe protocol, making it the first end-to-end solution from simulation to full stack validation.