The 11th generation Intel Core "Tiger Lake" mobile processor and pioneering "Lakefield" heterogenous x86 processor could debut around September or October, 2020, according to a leaked Lenovo internal slide posted by NotebookCheck. It also points to Intel denoting future processors' lithography with Foveros 3D Packaging as simply "3D," and not get into a nanometer number-game with AMD (which is now in 7 nm and on course to 5 nm in 2022). This makes sense as Foveros allows the combination of dies built on different silicon fabrication nodes.

"Tiger Lake" is still denoted as a 10 nm as it's a planar chip. Intel is developing it on a refined 10 nm+ silicon fabrication process, which apparently enables Intel to increase clock speeds without breaking the target power envelope. "Tiger Lake" sees the commercial debut of Intel's ambitious Xe graphics architecture as an iGPU solution. "Lakefield," on the other hand, is a 5-core processor combining four "Tremont" low power x86-64 cores with a "Sunny Cove" high-powered core, in a setup rivaling Arm big.LITTLE, enabling the next generation of mobile computing form-factors, which Intel and its partners are still figuring out under Project Athena.

The Intel Graphics Twitter account was on fire today, because they posted an update on the development of the Xe graphics processor, mentioning that samples are ready and packed up in quite an interesting package. The processor in question was discovered to be a Xe-HP GPU variant with an estimated die size of 3700 mm², which means we sure are talking about a multi-chip package here. How we concluded that it is the Xe-HP GPU, is by words of Raja Koduri, senior vice president, chief architect, general manager for Architecture, Graphics, and Software at Intel. He made a tweet, which was later deleted, that says this processor is a "baap of all", meaning "big daddy of them all" when translated from Hindi.

Mr. Koduri previously tweeted a photo of the Intel Graphics team at India, which has been working on the same "baap of all" GPU, which suggests this is a Xe-HP chip. It seems that this is not the version of the GPU made for HPC workloads (this is reserved for the Xe-HPC GPU), this model could be a direct competitor to offers like NVIDIA Quadro or AMD Radeon Pro. We can't wait to learn more about Intel's Xe GPUs, so stay tuned. Mr. Koduri has confirmed that this GPU will be used only for Data Centric applications as it is needed to "keep up with the data we are generating". He has also added that the focus for gaming GPUs is to start off with better integrated GPUs and low power chips above that, that could reach millions of users. That will be a good beginning as that will enable software preparation for possible high-performance GPUs in future.

Update May 2: changed "father" to "big daddy", as that's the better translation for "baap".
Update 2, May 3rd: The GPU is confirmed to be a Data Center component.

Intel earlier today published its Q1 2020 financial results. In its slide deck, the company illustrated many of the facts and numbers detailed in its earnings release, but one item caught our eye: a slide confirms that the company plans to launch its "Tiger Lake" client processor by mid-year (we would place that between June to August, 2020. Intel is quite ambitious about "Tiger Lake," as it forms the microarchitecture behind its most advanced 11th generation Core mobile processors. A slide from a November 2019 investor meet details the key design goals. "Tiger Lake" implements Intel's new "Willow Cove" CPU core design that succeeds "Sunny Cove" cores found inside its "Ice Lake" processors.

"Willow Cove" sees a new cache design, implementation of new transistor optimizations from Intel's 10 nm+ silicon fabrication process, and new security features. Besides "Willow Cove" CPU cores, "Tiger Lake" sees the market debut of the company's ambitious Xe graphics architecture as its iGPU solution. The chip will also support next-generation I/O. Here's hoping Intel is able to step up CPU core-counts with "Tiger Lake." The company was forced to tap into "Comet Lake" for both its 15 W and 45 W markets due to their higher core counts, despite an older CPU core and iGPU architecture than "Ice Lake." In the same slide, Intel mentions that it commenced sampling for "Ice Lake-SP" line of high core-count enterprise processors.

Intel Corporation today reported first-quarter 2020 financial results. "Our first-quarter performance is a testament to our team's focus on safeguarding employees, supporting our supply chain partners and delivering for our customers during this unprecedented challenge," said Bob Swan, Intel CEO."The role technology plays in the world is more essential now than it has ever been, and our opportunity to enrich lives and enable our customers' success has never been more vital. Guided by our cultural values, competitive advantages and financial strength, I am confident we will emerge from this situation an even stronger company."

In the first quarter, Intel achieved 34 percent data-centric revenue growth and 14 percent PC-centric revenue growth YoY. The company maintained essential factory operations with greater than 90 percent on-time delivery while supporting employees, customers and communities in response to the COVID-19 pandemic. This includes a new Intel Pandemic Response Technology Initiative to combat the virus where we can uniquely make a difference with Intel technology, expertise, and resources.

Intel is revisiting the concept of asymmetric multi-GPU introduced with DirectX 12. The company posted an elaborate technical slide-deck it originally planned to present to game developers at the now-cancelled GDC 2020. The technology shows promise because the company isn't insulting developers' intelligence by proposing that the iGPU lying dormant be made to shoulder the game's entire rendering pipeline for a single-digit percentage performance boost. Rather, it has come up with innovating augments to the rendering path such that only certain lightweight compute aspects of the game's rendering be passed on to the iGPU's execution units, so it has a more meaningful contribution to overall performance. To that effect, Intel is on the path of coming up with SDK that can be integrated with existing game engines.

Microsoft DirectX 12 introduced the holy grail of multi-GPU technology, under its Explicit Multi-Adapter specification. This allows game engines to send rendering traffic to any combinations or makes of GPUs that support the API, to achieve a performance uplift over single GPU. This was met with lukewarm reception from AMD and NVIDIA, and far too few DirectX 12 games actually support it. Intel proposes a specialization of explicit multi-adapter approach, in which the iGPU's execution units are made to process various low-bandwidth elements both during the rendering and post-processing stages, such as Occlusion Culling, AI, game physics, etc. Intel's method leverages cross-adapter shared resources sitting in system memory (main memory), and D3D12 asynchronous compute, which creates separate processing queues for rendering and compute.

Intel's upcoming Rocket Lake-S desktop platform is expected to arrive sometime later this year, however, we didn't have any concrete details on what will it bring. Thanks to the exclusive information obtained by VideoCardz'es sources at Intel, there are some more details regarding the RKL-S platform. To start, the RKL-S platform is based on a 500-series chipset. This is an iteration of the upcoming 400-series chipset, and it features many platform improvements. The 500-series chipset based motherboards will supposedly have an LGA 1200 socket, which is an improvement in pin count compared to LGA 1151 socket found on 300 series chipset.

The main improvement is the CPU core itself, which is supposedly a 14 nm adaptation of Tiger Lake-U based on Willow Cove core. This design is representing a backport of IP to an older manufacturing node, which results in bigger die space due to larger node used. When it comes to the platform improvements, it will support the long-awaited PCIe 4.0 connection already present on competing platforms from AMD. It will enable much faster SSD speeds as there are already PCIe 4.0 NVMe devices that run at 7 GB/s speeds. With RKL-S, there will be 20 PCIe 4.0 lanes present, where four would go to the NVMe SSD and 16 would go to the PCIe slots from GPUs. Another interesting feature of the RKL-S is the addition of Xe graphics found on the CPU die, meant as iGPU. Supposedly based on Gen12 graphics, it will bring support for HDMI 2.0b and DisplayPort 1.4a connectors.

Today, The Khronos Group, an open consortium of industry-leading companies creating advanced interoperability standards, announces the ratification and public release of the Vulkan Ray Tracing provisional extensions, creating the industry's first open, cross-vendor, cross-platform standard for ray tracing acceleration. Primarily focused on meeting desktop market demand for both real-time and offline rendering, the release of Vulkan Ray Tracing as provisional extensions enables the developer community to provide feedback before the specifications are finalized. Comments and feedback will be collected through the Vulkan GitHub Issues Tracker and Khronos Developer Slack. Developers are also encouraged to share comments with their preferred hardware vendors. The specifications are available today on the Vulkan Registry.

Ray tracing is a rendering technique that realistically simulates how light rays intersect and interact with scene geometry, materials, and light sources to generate photorealistic imagery. It is widely used for film and other production rendering and is beginning to be practical for real-time applications and games. Vulkan Ray Tracing seamlessly integrates a coherent ray tracing framework into the Vulkan API, enabling a flexible merging of rasterization and ray tracing acceleration. Vulkan Ray Tracing is designed to be hardware agnostic and so can be accelerated on both existing GPU compute and dedicated ray tracing cores if available.

Intel is rumored to be aligning its future-generation Xe GPU development with TSMC's node development cycle, with the company reportedly negotiating with the Taiwanese foundry for 6 nm and 3 nm allocation for its large Xe GPUs. Intel's first Xe discrete GPUs for the market, however, are reportedly built on the company's own 10 nm+ silicon fabrication process.

While Intel's fascination with TSMC 3 nm is understandable, seeking out TSMC's 6 nm node raises eyebrows. Internally referred to as "N6," the 6 nm silicon fabrication node at TSMC is expected to go live either towards the end of 2020 or early 2021, which is when Intel's 10 nm+ node is expected to pick up volume production, beginning with the company's "Tiger Lake" processors. Perhaps a decision has been made internally to ensure that Xe doesn't eat too much into Intel's own foundry capacities meant for processor manufacturing, and to instead outsource Xe manufacturing to third-party foundries like TSMC and Samsung eventually. Way back in April 2019 it was rumored that Intel was evaluating Samsung as a foundry partner for Xe.

Intel NUC 11 Extreme is the spiritual successor to the "Hades Canyon" and "Skull Canyon" NUC, and implements the company's next-generation 10 nm+ "Tiger Lake" processor. Codenamed "Panther Canyon," the NUC 11 Extreme represents a line of ultra-compact desktops with serious computing power, bringing together the company's highest-performance CPU cores and iGPUs. The "Tiger Lake-U" SoC powering the NUC 11 Extreme will reportedly be configured with a 28-Watt TDP, and will come in Core i3, Core i5, and Core i7 variants.

The "Tiger Lake-U" processor is expected to combine next-generation "Willow Cove" CPU cores with an iGPU based on Intel's new Xe graphics architecture, in what could be the first commercial outing for both. The NUC 11 Extreme "Panther Canyon" will also support up to 64 GB of dual-channel DDR4-3200 memory over SO-DIMMs, an M.2-2280 slot with PCI-Express 4.0 x4 and SATA 6 Gbps wiring, and option for Intel Optane M10 cache memory. On the connectivity front, and Intel AX-201 WLAN card provides 802.11ax Wi-Fi 6, and Bluetooth 5. A 2.5 GbE wired interface will also be available. These will also be among the first NUCs to feature front- and rear-Thunderbolt ports (possibly next-gen 80 Gbps given that the platform implements PCIe gen 4.0). The NUC 11 Extreme "Panther Canyon" is expected to launch some time in the second half of 2020.

This year's Game Developers Conference (GDC) that will take place in March is forming to become a very interesting one. According to the GDC schedule platform, Intel is having a presentation about its upcoming Xe graphics card architecture. Saying that "Intel's brand new Xe Architecture, has been teased for a while, and is scheduled for release later this year! This update brings a significant compute, geometry and throughput improvements over today's widely used Gen9 and Gen11 graphics.", Intel is giving us a slight hint of what is to come.

Presented by Intel's senior developer relations engineer, Antonie Cohade, the talk will include an in-depth look of the Xe hardware architecture and its implementations. Said to introduce "powerful new features", the talk about Xe graphics should include a mention of the latest trend in the world of 3D graphics, ray tracing, and show us what are the capabilities of the new GPU architecture.

Today, The Khronos Group, an open consortium of industry-leading companies creating advanced interoperability standards, announces the release of the Vulkan 1.2 specification for GPU acceleration. This release integrates 23 proven extensions into the core Vulkan API, bringing significant developer-requested access to new hardware functionality, improved application performance, and enhanced API usability. Multiple GPU vendors have certified conformant implementations, and significant open source tooling is expected during January 2020.

Vulkan continues to evolve by listening to developer needs, shipping new functionality as extensions, and then consolidating extensions that receive positive developer feedback into a unified core API specification. Carefully selected API features are made optional to enable market-focused implementations. Many Vulkan 1.2 features were requested by developers to meet critical needs in their engines and applications, including: timeline semaphores for easily managed synchronization; a formal memory model to precisely define the semantics of synchronization and memory operations in different threads; descriptor indexing to enable reuse of descriptor layouts by multiple shaders; deeper support for shaders written in HLSL, and more.

At a media event on Wednesday, Intel invited us to check out their first working modern discrete graphics card, the Xe DG1 Software Development Vehicle (developer-edition). Leading the event was our host Ari Rauch, Intel Vice President and General Manager for Graphics Technology Engineering and dGPU Business. Much like gruff developer-editions of game consoles released to developers several quarters ahead of market launch, the DG1-SDV allows software developers to discover and learn the Xe graphics architecture, and develop optimization processes for their current and future software within their organizations. We walked into the event expecting to see a big ugly PCB with a bare fan-heatsink and a contraption that sort-of looks like a graphics card; but were pleasantly surprised with what we saw: a rather professional product design.

What we didn't get at the event, through, was a juicy technical breakdown of the Xe graphics architecture, and its various components that add up to the GPU. We still left pleasantly surprised for what we were shown: it works! The DG1-SDV is able to play games at 1080p, even if they are technically lightweight titles like "Warframe," and aren't maxing out settings. The SDV is a 15.2 cm-long graphics card that relies on the PCI-Express slot for power entirely (and hence pulling less than 75 W).

At Supercomputing 2019, Intel unveiled its vision for extending its leadership in the convergence of high-performance computing (HPC) and artificial intelligence (AI) with new additions to its data-centric silicon portfolio and an ambitious new software initiative that represents a paradigm shift from today's single-architecture, single-vendor programming models.

Addressing the increasing use of heterogeneous architectures in high-performance computing, Intel expanded on its existing technology portfolio to move, store and process data more effectively by announcing a new category of discrete general-purpose GPUs optimized for AI and HPC convergence. Intel also launched the oneAPI industry initiative to deliver a unified and simplified programming model for application development across heterogenous processing architectures, including CPUs, GPUs, FPGAs and other accelerators. The launch of oneAPI represents millions of Intel engineering hours in software development and marks a game-changing evolution from today's limiting, proprietary programming approaches to an open standards-based model for cross-architecture developer engagement and innovation.

Intel's first Xe GPU built on the company's 7 nm silicon fabrication process will be codenamed "Ponte Vecchio," according to a VideoCardz report. These are not gaming GPUs, but rather compute accelerators designed for exascale computing, which leverage the company's CXL (Compute Express Link) interconnect that has bandwidth comparable to PCIe gen 4.0, but with scalability features slated to come out with future generations of PCIe. Intel is preparing its first enterprise compute platform featuring these accelerators codenamed "Project Aurora," in which the company will exert end-to-end control over not just the hardware stack, but also the software.

"Project Aurora" combines up to six "Ponte Vecchio" Xe accelerators with up to two Xeon multi-core processors based on the 7 nm "Sapphire Rapids" microarchitecture, and OneAPI, a unifying API that lets a single kind of machine code address both the CPU and GPU. With Intel owning the x86 machine architecture, it's likely that Xe GPUs will feature, among other things, the ability to process x86 instructions. The API will be able to push scalar workloads to the CPU, and and the GPU's scalar units, and vector workloads to the GPU's vector-optimized SIMD units. Intel's main pitch to the compute market could be significantly lowered software costs from API and machine-code unification between the CPU and GPU.Image Courtesy: Jan Drewes

Intel is working hard to bring its first discrete GPU lineup triumphantly, after spending years with past efforts to launch the new lineup resulting in a failure. During its Q3 earnings call, some exciting news was presented, with Intel's CEO Bob Swan announcing that "This quarter we've achieved power-on exit for our first discrete GPU DG1, an important milestone." By power on exit, Mr. Swan refers to post-silicon debug techniques that involve putting a prototype chip on a custom PCB for testing and seeing if it works/boots. With a successful test, Intel now has a working product capable of running real-world workloads and software, that is almost ready for sale.

Additionally, the developer kit for the "DG1" graphics card is supposedly being sent to various developers over the world, according to European Economy Commission listings. Called the "Discrete Graphics DG1 External FRD1 Accessory Kit (Alpha) Developer Kit" this bundle is marked as a prototype in the alpha stage, meaning that the launch of discrete Xe GPUs is only a few months away. This confirming previous rumor that Xe GPUs will launch in 2020 sometime mid-year, possibly in July/August time frame.

According to the sources close to DigiTimes, Intel will unveil its first discrete 10 nm graphics cards named "Xe" very soon, with the first wave of Xe GPUs expected to arrive some time in 2020. Said to launch mid year, around July or August, Intel will start selling initial Xe GPU models of the long awaited product to consumers, in hope of gaining a share in the massive market using GPU for acceleration of all kinds of tasks.

Perhaps one of the most interesting notes DigiTimes reported is that "... Intel's GPUs have already received support from the upstream supply chain and has already been integrated into Intel's CPUs to be used in the datacenter and AI fields.", meaning that AIB partners already have access to first 10 nm graphics chips that are ready for system integration. First generation of Xe graphics cards will cover almost whole GPU market, including PC, datacenter, and AI applications where NVIDIA currently holds the top spot.

Intel at the Intel Developer Conference 'IDC' 2019 in Tokyo revealed their performance projections for mobility Xe GPUs, which will supersede their current consumer-bound UHD620 graphics under the Gen 11 architecture. The company is being vocal in that they can achieve an up to 2x performance uplift over their previous generation - but that will likely only take place in specific scenarios, and not as a rule of thumb. Just looking at Intel's own performance comparison graphics goes to show that we're mostly looking at between 50% and 70% performance improvements in popular eSports titles, which are, really, representative of most of the gaming market nowadays.

The objective is to reach above 60 FPS in the most popular eSports titles, something that Gen 11 GPUs didn't manage with their overall IPC and dedicated die-area. We've known for some time that Intel's Xe (as in, exponential) architecture will feature hardware-based raytracing, and the architecture is being developed for scalability that goes all the way from iGPUs to HPC platforms.

Intel China through its Weibo (Twitter-equivalent) handle put out more official-looking renders of its Xe graphics card. The Weibo post doesn't cite an author, leading us to speculate that the company's industrial design team is close to finalizing a product-design for at least the client-segment derivative of Xe. The swanky-looking card apparently has a stamped metal cooler shroud, a cooling solution that's based on a fin-stack heatsink that's ventilated by three fans, and quite some LED embellishment. An interesting design detail is the exponent symbol projected on the center fan. The power inputs are located at the tail end of the card, which is where most professional graphics cards have them; and consist of a pair of 8-pin PCIe inputs. Display inputs include three DisplayPorts, and an HDMI. The first Xe graphics card bound for 2020 will be built on Intel's 10 nm silicon fabrication process, which offers comparable transistor-densities to current 7 nm nodes.

Today an article was posted on Intel's internal employee-only portal called "Circuit News". The post, titled "AMD competitive profile: Where we go toe-to-toe, why they are resurgent, which chips of ours beat theirs" goes into detail about the recent history of AMD and how the company achieved its tremendous growth in recent years. Further, Intel talks about where they see the biggest challenges with AMD's new products, and what the company's "secret sauce" is to fight against these improvements.The full article follows:

Intel's discrete graphics card for PC enthusiasts is real. Intel won't just address the pro-graphics and accelerated-compute markets, but also consumer graphics, challenging the duopoly of NVIDIA GeForce and AMD Radeon. Scheduled for 2020, the new Intel Xᵉ is a family of discrete GPUs targeting client-segment (consumer graphics) as well as enterprise (pro-graphics and compute).

As for performance, we speculate that the first Xᵉ products could span a vast lineup of ASICs starting single-digit TFLOP/s range for the client-segment GPU, looking purely at a nondescript performance-time graph presented by Intel. This graph depicts performance double linearly over time up to Gen9, and increase to Intel's own state 1 TFLOP/s for the Gen11 iGPU core in 2019 (a full four years following Gen9). There are a spectrum of GPUs going from the entry-level client-segment all the way up to mid-range and enthusiast segment (Intel finally used the E-word).