Samsung Electronics Co., Ltd., the world leader in advanced memory technology, announced today that it has developed a small-footprint, wafer-level processed stack package (WSP) of high density memory chips using 'through silicon via' (TSV) interconnection technology. WSP actually reduces the physical size of a stacked set of semiconductor chips, while greatly improving overall performance. Widely seen as the next generation in package technologies, WSP can be applied to all types of hybrid packages, including memory and processors, to deliver higher speed and higher density with minimum use of chip space. Samsung's industry-first WSP is a 16Gbit memory solution that stacks eight 2Gb NAND chips. The WSP generates a much smaller multi-chip package (MCP), which is the current mainstream solution for designing miniaturized, high-capacity memory devices. Samsung's eight-chip WSP prototype sample, which vertically stacks eight 50(micrometers), 2Gb NAND flash die, is 0.56 millimeters in height.