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Intel Mobile Pentium III 900

1
Cores
1
Threads
23 W
TDP
900 MHz
Frequency
N/A
Boost
Coppermine
Codename
Socket 495
Socket
Front
Front
Intel Socket 495
Intel Socket 495
The Intel Mobile Pentium III 900 was a mobile processor with 1 core, launched in March 2001, at an MSRP of $562. It is part of the Pentium III lineup, using the Coppermine architecture with Socket 495. Mobile Pentium III 900 has 256 KB of L2 cache and operates at 900 MHz. Intel is making the Mobile Pentium III 900 on a 180 nm production node using 28 million transistors. The multiplier is locked on Mobile Pentium III 900, which limits its overclocking potential.
With a TDP of 23 W, the Mobile Pentium III 900 consumes only little energy. The highest officially supported memory speed is 133 MT/s, but with overclocking (and the right memory modules) you can go even higher. Actual memory technology support depends on the chosen motherboard, because the memory controller is located on the motherboard (not in the processor). For communication with other components in the machine, Mobile Pentium III 900 uses a PCI-Express N/A connection.
Many games will refuse to start on this processor due to the lack of the SSE2/SSE3/SSE4 instruction set.

Physical

Socket: Intel Socket 495
Foundry: Intel
Process Size: 180 nm
Transistors: 28 million
Die Size: 106 mm²
Package: µPGA
tJMax: 100°C

Processor

Market: Mobile
Production Status: End-of-life
Release Date: Mar 19th, 2001
Launch Price: $562
Part#: SL53T
SL58Q
SL59J
SL5AV

Performance

Frequency: 900 MHz
Low Frequency Mode:700 MHz
Turbo Clock: N/A
Base Clock: 100 MHz
Multiplier: 9.0x
Multiplier Unlocked: No
Voltage: 1.7 V
LFM Voltage:1.35 v
TDP: 23 W
Max Power:34 W

Architecture

Codename: Coppermine
Generation: Pentium III
(Coppermine)
Memory Support: unknown
Depends on motherboard
Rated Speed: 133 MT/s
Memory Bus: Single-channel
Northbridge Location: Motherboard
ECC Memory: No
PCI-Express: N/A

Core Config

# of Cores: 1
# of Threads: 1
SMP # CPUs: 1
Integrated Graphics: On certain motherboards (Chipset feature)

Cache

Cache L1: 32 KB
Cache L2: 256 KB

Features

  • MMX
  • SSE
  • SpeedStep

Notes

SL59J, SL5AV - Stepping C0
SL53T, SL58Q - Stepping D0
Oct 18th, 2024 04:49 EDT change timezone

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