From Tomshardware: '
MSI recently confirmed via a livestream that Intel uses two different dies for the Alder Lake series: One die has eight P-cores and eight E-cores (8P+8E), and another has just six P-cores (6+0). Obviously, the latter die is much smaller and thus more cost-effective, therefore making far more sense for use in the non-hybrid Alder Lake chips with six or fewer cores.
However, leaked testing indicates that the Core i5-12400 chips vary on a chip-to-chip basis and can come with either die type. That means C0 stepping chips like ours actually have a total of eight P-cores and eight E-cores, but Intel disables the extra cores to trim it down to a 6+0 design. Naturally, that helps the company sell larger dies that encounter defects during manufacturing. It could also help improve supply and manufacturing efficiency when there aren't enough 'perfect' defect-free 6+0 dies available.
The physical difference between the dies — the 8P+8E design's ring bus extends to cover the disabled E-cores and P-Cores — implies that the H0-stepping 6+0 dies will have lower core-to-core latencies. That could theoretically lead to slightly faster performance under certain conditions. Additionally, anecdotal evidence also suggests that the H0 chips require less power. We're working to source an H0 chip for comparison and will follow up as necessary. '
