AMD SP5 EPYC "Genoa" Zen4 Processor Socket Pictured in the Flesh

[btarunr]

Here's the first picture of AMD Socket SP5, the huge new CPU socket the company is building its next-generation EPYC "Genoa" enterprise processors around. "Genoa" will be AMD's first server products to implement the new "Zen 4" CPU cores, and next-gen I/O, including DDR5 memory and PCI-Express Gen 5. SP5, much like its predecessor SP3, is a land-grid array (LGA) socket, and has 6,096 pins.

The vast pin-count enables power to support CPU core-counts of up to 96 on the EPYC "Genoa," and up to 128 on the EPYC "Bergamo" cloud processor; a 12-channel DDR5 memory interface (24 sub-channels); and up to 128 PCI-Express 5.0 lanes. The socket's retention mechanism and processor installation procedure appears similar to that of the SP3, although the thermal requirements of SP5 will be entirely new, with processors expected to ship with TDP as high as 400 W, compared to 280 W on the current-generation EPYC "Milan." AMD is expected to debut EPYC "Genoa" in the second half of 2022.



View at TechPowerUp Main Site | Source

 

[firewrath9]

thats a lot of bw

 

[mechtech]

Kind of sceptical looking mobo. Looks like early prototype/eng sample?

 

[Chrispy_]

Kind of sceptical looking mobo. Looks like early prototype/eng sample?

In what way? Looks like a normal server-grade board to me.
It's obviously early, possibly an engineering sample at this stage but server boards are rarely glamourous things.

 

[Jism]

In what way? Looks like a normal server-grade board to me.
It's obviously early, possibly an engineering sample at this stage but server boards are rarely glamourous things.

And not overbulked with RGB or 20+ phases of VRM.

 

[DeathtoGnomes]

core-counts of up to 96 on the EPYC "Genoa," and up to 128 on the EPYC "Bergamo" cloud proc

so 192 threads and 256 threads respectively.

 

[mechtech]

In what way? Looks like a normal server-grade board to me.
It's obviously early, possibly an engineering sample at this stage but server boards are rarely glamourous things.

Hard to say. Just looks a bit rough around the edges so to speak. Like more of a low production thing than mass production. Like I said maybe an engineering sample? The socket retainer…usually see more noticeable marks around edges from forming/stamping..???

and server boards are glamorous!!! Look at all those glorious dimm slots!!

 

[Chrispy_]

Hard to say. Just looks a bit rough around the edges so to speak. Like more of a low production thing than mass production. Like I said maybe an engineering sample? The socket retainer…usually see more noticeable marks around edges from forming/stamping..???

and server boards are glamorous!!! Look at all those glorious dimm slots!!

I think it's just a potato-quality image that hides all the detail you're expecting to see.

 

[MachineLearning]

In what way? Looks like a normal server-grade board to me.
It's obviously early, possibly an engineering sample at this stage but server boards are rarely glamourous things.

This is at least a dual socket board too, judging by the asymmetrical number of DIMM slots

 

[Wirko]

This is at least a dual socket board too, judging by the asymmetrical number of DIMM slots

Either that, or it's a prototype for testing both possible configurations: 1 slot per channel on the left, 2 slots per channel on the right.

 

[Assimilator]

That is the potato-est quality of potato-quality images.

 

[Wirko]

That is the potato-est quality of potato-quality images.

The spy hid his camera in a box like this one to make himself less suspicious.

 

[beautyless]

I wonder how they 'up to' 256cores.
12dies for Genoa. Then downs to 8dies for Bergamo and Turin and 16c/1chiplet?

 

[zlobby]

Can't wait to see thorough benchmarking of the bad boys.

 

[Sabotaged_Enigma]

4094, 6096...
Next 8098? lol

 

[Chrispy_]

I really want to see Intel go back to the HEDT space so we can get more threadrippers as a reaction from AMD.

EPYC is nice an all, but you buy them because the means justify the cost and they go into production with no room to mess about with them or tinker.

I thoroughly enjoyed messing around with 1st and 2nd gen threadrippers.

I wonder how they 'up to' 256cores.
12dies for Genoa. Then downs to 8dies for Bergamo and Turin and 16c/1chiplet?

I doubth they'd make a 16C CCD for just one or two products.

Chances are much higher that their "standard" 8C CCD is it, and they can scale up to more CCDs per package due to DDR5 bandwidth/clock increases and improved developments of InfinityCache and InfinityFabric.

 

[mashie]

I'm looking forward to buy one of these monsters in 4 years when they get cycled out out of production.

The number of VMs you could run is staggering and that is with a single socket motherboard.

 

[Wirko]

I wonder how they 'up to' 256cores.
12dies for Genoa. Then downs to 8dies for Bergamo and Turin and 16c/1chiplet?

It's also worth asking, why? That would be 21 multithreaded cores per channel of DDR5-6000.

 

[Xajel]

I really want to see Intel go back to the HEDT space so we can get more threadrippers as a reaction from AMD.

EPYC is nice an all, but you buy them because the means justify the cost and they go into production with no room to mess about with them or tinker.

I thoroughly enjoyed messing around with 1st and 2nd gen threadrippers.


I doubth they'd make a 16C CCD for just one or two products.

Chances are much higher that their "standard" 8C CCD is it, and they can scale up to more CCDs per package due to DDR5 bandwidth/clock increases and improved developments of InfinityCache and InfinityFabric.

These are supposedly the new Zen4c cores, a slimmed-down version of Zen4 optimized for cloud applications, where HCC, power efficiency & die size are prioritized over regular cores. Just like how the cores inside the APUs are smaller (less L3 cache) and have more power-focused designs like more power gates and so on.

They will use some for EPYC, and next year they might use it along with Zen5 in the desktop platform as well, kinda AMD's version of the hybrid big.LITTLE game.

 

[Minus Infinity]

I really want to see Intel go back to the HEDT space so we can get more threadrippers as a reaction from AMD.

EPYC is nice an all, but you buy them because the means justify the cost and they go into production with no room to mess about with them or tinker.

I thoroughly enjoyed messing around with 1st and 2nd gen threadrippers.


I doubth they'd make a 16C CCD for just one or two products.

Chances are much higher that their "standard" 8C CCD is it, and they can scale up to more CCDs per package due to DDR5 bandwidth/clock increases and improved developments of InfinityCache and InfinityFabric.

It's coming, they are entering the HEDT space with Sapphire Rapids later this year.

 

[Wirko]

These are supposedly the new Zen4c cores, a slimmed-down version of Zen4 optimized for cloud applications, where HCC, power efficiency & die size are prioritized over regular cores. Just like how the cores inside the APUs are smaller (less L3 cache) and have more power-focused designs like more power gates and so on.

They will use some for EPYC, and next year they might use it along with Zen5 in the desktop platform as well, kinda AMD's version of the hybrid big.LITTLE game.

Zen 4C is supposed to be made with small cores only. I don't see how this could be useful in Ryzen desktop chips. Unless AMD goes wild and glues together a processor with one Zen 4 die and one Zen 4C die.

 

[Haile Selassie]

In what way? Looks like a normal server-grade board to me.
It's obviously early, possibly an engineering sample at this stage but server boards are rarely glamourous things.

It's a typical (AMD) test vehicle motherboard with lots of probe pins.