- Joined
- Aug 20, 2007
- Messages
- 21,469 (3.40/day)
System Name | Pioneer |
---|---|
Processor | Ryzen R9 9950X |
Motherboard | GIGABYTE Aorus Elite X670 AX |
Cooling | Noctua NH-D15 + A whole lotta Sunon and Corsair Maglev blower fans... |
Memory | 64GB (4x 16GB) G.Skill Flare X5 @ DDR5-6000 CL30 |
Video Card(s) | XFX RX 7900 XTX Speedster Merc 310 |
Storage | Intel 905p Optane 960GB boot, +2x Crucial P5 Plus 2TB PCIe 4.0 NVMe SSDs |
Display(s) | 55" LG 55" B9 OLED 4K Display |
Case | Thermaltake Core X31 |
Audio Device(s) | TOSLINK->Schiit Modi MB->Asgard 2 DAC Amp->AKG Pro K712 Headphones or HDMI->B9 OLED |
Power Supply | FSP Hydro Ti Pro 850W |
Mouse | Logitech G305 Lightspeed Wireless |
Keyboard | WASD Code v3 with Cherry Green keyswitches + PBT DS keycaps |
Software | Gentoo Linux x64 / Windows 11 Enterprise IoT 2024 |
If you aren't pairing that 1.3+ volts with some sort of exotic cooling, you may be asking for a burned CPU.Yeah but unfortunately they have locked soc voltage to 1.300v on my 7950x, x670e taichi, so back to an older bios ffs...
I really have a hard time believing anyone should be running greater than 1.3v, the benefits are few and the dangers are seemingly many.
I agree there is likely more to the story here, but I personally wouldn't be running over 1.3v SOC until we know the whole picture.So.........instead they're just blaming VSOC? While for 7 months now, people everywhere have been defaulting to 1.35V VSOC and no one at AMD so much as batted an eyelid? And so now suddenly a reduction of 50mV will magically prevent physical damage?
I'm not sure what conclusion buildzoid came to in his video, but no evidence so far clearly points to VSOC. VSOC max current draw remains low on chiplets. The visible evidence of damaged pads and areas are all far away from VSOC pads and IO die areas.
I'm not a fan of disabling features either. Perhaps they could just plaster a big warning on voltages past a point, and trip some efuse or something that I'm sure they could check warranty wise.I doubt that very much, considering there are clearly samples of Raphael out there that require that VSOC to hit 3000MHz UCLK. It's not like they got rid of IO die silicon quality variance overnight.
Yes, if their obeyed and the alleged bug of copying VDIMM as SOC voltage isn't real.So, basically (if I were to take Yuri's statement as fact) an SOC voltage of less than 1.3 volts is safe. So, my previous voltage setting of 1.245 and 1.25 were safe, at least according to him.
My VDIMMs run at around 1.35v in EXPO, so even if the board did do that, hopefully nothing would just explode.
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