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NVIDIA Playstation 3 GPU 40nm

Graphics Processor
RSX-40nm
Pixel Shaders
24
Vertex Shaders
8
TMUs
24
ROPs
8
Memory Size
256 MB
Memory Type
GDDR3
Bus Width
128 bit
GPU Chip
GPU
Front 2
Front 2
Back
Back
The Playstation 3 GPU 40nm was a high-end gaming console graphics solution by NVIDIA, launched on October 4th, 2012. Built on the 40 nm process, and based on the RSX-40nm graphics processor, in its RSX-CXD5302 variant, the device does not support DirectX. The RSX-40nm graphics processor is an average sized chip with a die area of 114 mm² and 302 million transistors. It features 24 pixel shaders and 8 vertex shaders, 24 texture mapping units, and 8 ROPs. NVIDIA includes 256 MB GDDR3 memory, which are connected using a 128-bit memory interface. The GPU is operating at a frequency of 550 MHz, memory is running at 650 MHz.
Its power draw is rated at 35 W maximum. The console's dimensions are 290 mm x 290 mm x 65 mm, and it features a igp cooling solution. Its price at launch was 399 US Dollars.

Graphics Processor

GPU Name
RSX-40nm
GPU Variant
RSX-CXD5302
Architecture
Curie
Foundry
Sony
Process Size
40 nm
Transistors
302 million
Density
2.6M / mm²
Die Size
114 mm²

Graphics Card

Release Date
Oct 4th, 2012
Generation
Console GPU
(Sony)
Production
End-of-life
Launch Price
399 USD

Clock Speeds

GPU Clock
550 MHz
Memory Clock
650 MHz
1300 Mbps effective

Memory

Memory Size
256 MB
Memory Type
GDDR3
Memory Bus
128 bit
Bandwidth
20.80 GB/s

Render Config

Pixel Shaders
24
Vertex Shaders
8
TMUs
24
ROPs
8

Theoretical Performance

Pixel Rate
4.400 GPixel/s
Vertex Rate
1.100 GVertices/s
Texture Rate
13.20 GTexel/s

Board Design

Length
290 mm
11.4 inches
Width
290 mm
11.4 inches
Height
65 mm
2.6 inches
Weight
3.2 kg (7.1 lbs)
TDP
35 W
Outputs
1x HDMI 1.3

Graphics Features

DirectX
N/A
OpenGL
ES 1.1
OpenCL
N/A
Vulkan
N/A
Pixel Shader
3.0
Vertex Shader
3.0

Console Notes

Playstation 3 Slim (4th Generation)
120GB CECH-21xxA = October, 2009
250GB CECH-21xxB = October, 2009
160GB CECH-25xxA = July 29th, 2010
320GB CECH-25xxB = July 29th, 2010
160GB CECH-30xxA = August, 2010
320GB CECH-30xxB = September 19th, 2010

Playstation 3 Super Slim (5th Generation)
12GB CECH-40xxA = October 12th, 2012
250GB CECH-40xxB = October 4th, 2012
500GB CECH-40xxC = October 4th, 2012
12GB CECH-42xxA = June 3rd, 2013
250GB CECH-42xxB = June 3rd, 2013
500GB CECH-42xxC = June 3rd, 2013

RSX-40nm GPU Notes

Multi-way programmable parallel floating-point shader pipelines
Independent pixel/vertex shader architecture

24 parallel pixel-shader ALU pipes clocked @ 550 MHz
5 ALU operations per pipeline, per cycle
- 2 vector4
- 2 scalar/dual/co-issue and fog ALU
- 1 Texture ALU
16 floating-point operations per pipeline, per cycle

Pixel Floating Point Operations:
211.2 GFLOPS
(550MHz x 24 Shaders x 16 ops per clock per cycle)

8 parallel vertex pipelines @ 500 MHz
2 ALU operations per pipeline, per cycle
- 1 vector4
- 1 scalar, dual issue
10 floating-point operations per pipeline, per cycle

Vertex Floating Point Operations:
40.0 GFLOPS
(500MHz x 8 Shaders x 10 ops per clock per cycle)

Total Floating Point Operations:
251.2 GFLOPS
(550MHz x 24 Shaders x 16 ops per clock per cycle)
+(500MHz x 8 Shaders x 10 ops per clock per cycle)

74.0 billion shader operations/s
(24 Pixel Shader Pipelines x 5 ALUs x 550 MHz)
+(8 Vertex Shader Pipelines x 2 ALUs x 500 MHz)

24 texture filtering units (TF)
8 vertex texture addressing units (TA)
24 filtered samples per clock

Peak texel fillrate:
13.2 GTexel/s
(24 textures x 550 MHz)

32 unfiltered texture samples per clock
(8 TA x 4 texture samples)

8 Render Output units / pixel rendering pipelines

Peak pixel fillrate:
4.4 GPixel/s
(8 ROPs x 550 MHz)

Peak Z sample rate:
8.8 GSamples/s
(2 Z-samples x 8 ROPs x 550 MHz)

Peak Dot product operations:
56 billion/s (combined with Cell CPU)

128-bit pixel precision offers rendering of scenes with High dynamic range rendering (HDR)

Cell FlexIO bus interface
20 GB/s read to the Cell and XDR memory
15 GB/s write to the Cell and XDR memory

Support for PSGL (OpenGL ES 1.1 + Nvidia Cg)
Support for S3TC texture compression
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