Not all news coming out of Toshiba is bad or somewhat bad. The Japanese giant still is one of the biggest players in the NAND semiconductor business, no matter the recent woes. Even more recently, though, Toshiba announced they had developed quadruple level cell NAND memory, which should improve density and, therefore, reduce the price/GB ratio on future consumer products, such as SSDs. However, each increase in the number of cell levels bring concerns regarding not only performance, but especially durability, since a higher number of states per cell increases the voltage steps that are applied to it (SLC NAND dealt with two voltage states, MLC with four, TLC with eight voltage states, and QLC will handle 16 of these.) This tends to make errors more common, and the cell's longevity to be compromised due to the amount of variation in its states, which means more powerful error correction techniques must be employed.According to Toshiba, its 3D QLC NAND targets around ~1000 program/erase cycles, which is close to TLC NAND flash. This is considerably higher than the amount of P/E cycles (100 - 150) expected for QLC by the industry, which means the company has achieved what many thought difficult. Toshiba has begun sampling of its 3D QLC NAND memory devices earlier this month. everything points to mass production on late 2018, early 2019, though, which means we still have a long way to go until we see this technology implemented. This won't be the one to save us from escalating NAND prices; we'll have to look to other, more market and supply-and-demand based factors instead.