AMD's upcoming FX series "Zambezi" desktop processors based on the "Bulldozer architecture are also expected to bring with them compatible motherboards, as AMD, on a number of occassions, stated that the chips will require a new socket (referred to as AM3+) and compatible chipset, and that the chips will be incompatible with existing AM3 socket and existing chipset. Information available with SweClockers points to the contrary.

According to the source, motherboard major ASUS is planning to provide support to AM3+ processors to some of its existing AM3 motherboards using mere BIOS updates. That's right, Zambezi will indeed be backwards compatible with AM3 and existing chipset, only what remains to be seen is if the processors will perform to their full potential and overclock well on existing platform. Amongst ASUS' Schindler's list are top of the line AM3 models, such as ROG Crosshair IV Formula and Extreme, M4A89TD PRO/USB3, and even AMD 890GX-based motherboards such as M4A89GTD PRO. The list also shows certain AM3+ motherboards that use dated chipsets such as 760G, probably the entry-level of ASUS' M5A series of motherboards.

Here are the first box-shots of AMD's upcoming series of high-end desktop processors, under the FX series, referred to as "Zambezi" by the company, internally. Zambezi is based on AMD's newest Bulldozer architecture that improves instruction per clock-cycle (IPC), and packs the latest industry standard instruction sets. As stated in an older article, AMD will not assign a brand-name (such as Phenom or Athlon) to name its high-end desktop processors, but will instead refer to them as "FX" processors. To that extent, the processors will even feature a logo that resembles that of AMD Radeon to a very large extant.

AMD designed two iterations of box-art each for its FX eight-core and FX quad-core processors, puictured below. The processors look to be shipping in cuboidal paperboard boxes, very much like AMD's processors already do. The art looks very "energetic" and makes use of the AMD "arrow" motif pointing in the top-right direction. The background in each iteration is distinct, one shows splashes of red (eight-core) or orange (quad-core), the other shows flow of red/orange. It's interesting to note that all boxes denote Black Edition with its unlocked bus multiplier feature, leading us to speculate that unlocked multiplier could be standard issue with FX series processors. Also shown is the second generation TurboCore technology support, and AMD's claim to be selling the first eight-core processor [in the consumer market]. AMD's FX processors will be released to market in June.

AMD is said to have finalized the shipping dates of its new high-end processor lineup. The company's new nameless lineup of high-end desktop processors will be released to market in the second half of June. The new processors will be built on the 32 nm manufacturing process, and will be based on the much talked about Bulldozer architecture. The reason it's "nameless" is because there's no processor brand (such as Athlon or Phenom) attached to it. The lineup will consist of AMD FX8000 series octo-core processors, AMD FX6000 series hexa-core processors, and AMD FX4000 series quad-core processors. The chip will feature high-speed DDR3 integrated memory controllers, but will lack integrated graphics. AMD will release as many as eight processor models. To support the processors, AMD's partners in the motherboard industry will release socket AM3+ motherboards based on AMD 9-series chipsets, around the same time.

AMD today announced the immediate availability of five new members of the AMD Opteron 6100 Series processor family that specifically address rising demand for low-power, balanced systems for SMBs and increased performance-per-dollar-per-watt for enterprise and public sector environments. Key partners including Acer, Dell and HP are launching new or refreshed AMD Opteron 6000 Series platform-based systems this quarter, powered by these new 12- and 8-core AMD Opteron processors.

"These new server CPUs deliver greater performance than we've ever had before," said Patrick Patla, vice president and general manager, Server Business, AMD. "When we launched the AMD Opteron 6000 Series platforms last year, we eliminated the '4P tax' and met market demands for higher performance-per-dollar-per-watt. Our customers' benchmarks and testimonials bear out these improvements, and these five new parts-and the rave reviews-prove that we continue to deliver on our vision."

Close to two weeks ago, reports surfaced about AMD claiming that its upcoming "Zambezi" 8-core desktop processor based on the company's new Bulldozer architecture is expected to perform 50% faster than Intel's Core i7 and its own Phenom II X6 processors. The slide forming the basis for the older report surfaced, and it's a little more than a cumulative performance estimate.

Slide #14 from AMD's Desktop Client Solutions presentation to its industry partners reveals that the company went ahead and provided a breakdown on which kinds of applications exactly does its new 8-core chip perform better compared to present-generation processors. The breakdown provides an interesting insight on the architecture itself. To begin with, AMD's 8-core Bulldozer "Zambezi" processor is 1.5X (50%) faster overall compared to Intel Core i7 "Bloomfield" 950, and AMD Phenom II X6 1100T. Breaking down that graph, the processor performs similar to the other chips in media applications, but features huge gains in gaming and 3D rendering, which is where most of its gains are coming from.

Here, take some salt. AMD reportedly gave out performance figures in a presentation to its partners, performance figures seen by DonanimHaber. It is reported that an 8-core processor based on the "Bulldozer" high-performance CPU architecture is pitched by its makers to have 50% higher performance than existing processors such as the Core i7 950 (4 cores, 8 threads), and Phenom II X6 1100T (6 cores). Very little is known about the processor, including at what clock speed the processor was running at, much less what other components were driving the test machine.

Taking this information into account, the said Bulldozer based processor should synthetically even outperform Core i7 980X six-core, Intel's fastest desktop processor in the market. Built from ground-up, the Bulldozer architecture focuses on greater inter-core communication and reconfigured ALU/FPU to achieve higher instructions per clock cycle (IPC) compared to the previous generation K10.5, on which its current Phenom II series processors are based. The processor is backed by new 9-series core logic, and a new AM3+ socket. AMD is expected to unveil this platform a little later this year.

AMD today announced that its Board of Directors has appointed Senior Vice President and CFO Thomas Seifert, 47, as interim CEO following the resignation of Dirk Meyer, 49, as president, CEO and a director of the company effective immediately.

A CEO Search Committee has been formed to begin the search for a new CEO. The Committee is led by Bruce Claflin, Chairman of AMD's Board of Directors, who has been named Executive Chairman of the Board as he assumes additional oversight responsibilities during the transition period. Seifert will maintain his current responsibilities as CFO and has asked not to be considered for the permanent CEO position.

MSI let its latest motherboard for the AMD Zambezi platform face the lens. The Big Bang Conqueror is based on the AMD 990FX chipset, and features the latest AM3+ socket to connect to processors based on AMD's Bulldozer architecture. The first set of processors will feature 8 cores, 16 MB cache, and dual-channel DDR3 memory with default DRAM speeds to match bandwidth provided by slower triple-channel DDR3 memory on current Intel Core i7 LGA1366 processors.

The Big Bang Conqueror uses a 10-phase VRM to power the CPU. The CPU is wired to four DDR3 DIMM slots for dual-channel memory. Expansion slots include three PCI-E 2.0 x16 (electrical x16/16/NC or x16/x8/x8), one PCI-E x16 (electrical x4), two PCI-E x1, and a PCI. Storage includes six internal SATA 6 Gb/s, two eSATA. Other connectivity includes USB 3.0, gigabit Ethernet, 8-channel audio with optical and coaxial SPDIF, and FireWire. Various overclocker-friendly features are also present.

Come 2011, and AMD is looking to give Intel its much awaited fightback at all market segments of consumer processors including the enthusiast-grade models. It will be made possible with AMD's new Bulldozer architecture, which gives the processor a much higher degree of inter-core integration, sharing of common components, higher instructions per clock-cycle, and Advanced Vector Extensions (AVX). AMD's Bulldozer "Zambezi" desktop chips will be reportedly available in two ultra high-end SKUs: the 8-core AMD Vision Black FX, and performance segment AMD Vision Ultimate FX. AMD suspended the use of "FX" identifier with its Phenom and Phenom II series processors, because it couldn't compete in higher-end market segments, and didn't want to dilute the "FX" identifier. It was replaced with "Black Edition" to help identify models with unlocked BClk multipliers. AMD's Vision Black FX processors will be competitive with Intel's highest-end processors, including Extreme Edition models.

AMD's upcoming "Bulldozer" architecture based processors that use a new socket type, the AM3+, are slated for Q2, 2011. To complement its launch, AMD will be launching the 9-series chipset series, consisting of four kinds of desktop chipset. The lineup starts with the AMD 990FX, the high-end 4-way CrossFireX-ready chipset, geared for high-end motherboards. Next up, is the 990X. This discrete graphics chipset is also ready for CrossFireX, but has just 16 PCI-Express 2.0 lanes to spare for graphics, platforms based on this will feature two PCI-Express x16 slots which reconfigure to electrical x8 slots when both are populated.

The third is an entry-level discrete graphics chipset that doesn't support CrossFire, but can spare one PCI-Express 2.0 x16 slot for discrete graphics, it's the AMD 970. Lastly, there's the 980G integrated graphics chipset, which features a DirectX 10.1 compliant IGP, which supports UVD 2.0 video acceleration. For some reason, this chipset doesn't support older AM3 processors, but only AM3+. The other chipsets in the series however, do support existing socket AM3 Athlon II and Phenom II series processors. All four northbridge chipsets support HyperTransport 3.0 processor interconnect, supporting data rates of up to 5.2 GT/s.

AMD's next-generation PC processor architecture that seeks to challenge the best Intel has, codenamed "Bulldozer", is set to make its desktop PC debut in 2Q next year, with a desktop processor die codenamed "Zambezi". AMD is seeking to target all market segments, including an enthusiast-grade 8-core segment, a performance 6-core segment, and a mainstream 4-core segment. The roadmap reveals that Zambezi will make its entry with the enthusiast-grade 8-core models first, starting with 125W and 95W models, trailed by 6-core and 4-core ones.

Another couple of architectural details revealed is that Zambezi's integrated memory controller (IMC) supports DDR3-1866 MHz as its standard memory type, just like Deneb supports DDR3-1333 MHz as its standard. DDR3-1866 MHz, or PC3-14900 as it's technically known, will churn out 29.8 GB/s in dual-channel mode, that's higher than triple-channel DDR3-1066 MHz (25.6 GB/s), which is Intel Core i7 LGA1366 processors' official memory standard. The 8-core and 6-core Zambezi models feature 8 MB of L3 cache, while the 4-core ones feature 4 MB. Another tidbit you probably already knew is that existing socket AM3 processors are forwards-compatible with AM3+ (Zambezi's socket), but Zambezi processors won't work on older AM3/AM2(+) socket motherboards.

At its annual Financial Analyst Day, AMD (NYSE: AMD) demonstrated how its unique combination of CPU and GPU computing technologies on a single die will enable breakthrough capabilities in an innovative processor design with planned OEM system availability in early 2011. AMD executives detailed how this new class of processor, AMD Fusion Accelerated Processing Units (APUs), is poised to create a sustained position of advantage by powering demanding PC workloads in sleek form factors with long battery life, pacing future AMD growth. AMD Fusion APUs are built from DirectX 11-capable GPU technology and either low-power or high-performance multi-core x86 CPU technology. These APUs are designed to vastly improve today's Internet, video processing and playback, and gaming (client and online) experiences. For the first time, AMD also demonstrated its new high-performance x86 multi-core CPU architecture codenamed "Bulldozer" and provided additional information around the "Bulldozer" launch schedule.

AMD today announced revenue for the third quarter of 2010 of $1.62 billion, a net loss of $118 million, or $0.17 per share, and operating income of $128 million. The company reported non-GAAP net income of $108 million, or $0.15 per share, and non-GAAP operating income of $144 million.

"AMD's third quarter performance was highlighted by solid gross margin and a continued focus on profitability, despite weaker than expected consumer demand," said Dirk Meyer, AMD president and CEO. "Our strategy to deliver platforms with superior visual experiences continues to resonate. We look forward to building on this momentum when we begin shipping our first AMD Fusion Accelerated Processor Units later this quarter."

Documents related to the "Orochi" 8-core processor by AMD based on its next-generation Bulldozer architecture reveal its cache hierarchy that comes as a bit of a surprise. Earlier this month, at a GlobalFoundries hosted conference, AMD displayed the first die-shot of the Orochi die, which legibly showed key features including the four Bulldozer modules which hold two cores each, and large L2 caches. In coarse visual inspection, the L2 cache of each module seems to cover 35% of its area. L3 cache is located along the center of the die. The documents seen by X-bit Labs reveal that each Bulldozer module has its own 2 MB L2 cache shared between two cores, and an L3 cache shared between all four modules (8 cores) of 8 MB.

This takes the total cache count of Orochi all the way up to 16 MB. This hierarchy suggests that AMD wants to give individual cores access to a large amount of faster cache (that's a whopping 2048 KB compared to 512 KB per core on Phenom, and 256 KB per core on Core i7), which facilitates faster inter-core, intra-module communication. Inter-module communication is enhanced by the 8 MB L3 cache. Compared to the current "Istanbul" six-core K10-based die, that's a 77% increase in cache amount for a 33% core count increase, 300% increase in L2 cache per core. Orochi is built on a 32 nm GlobalFoundries process, it is sure to have a very high transistor count.

Here is the first picture of a working prototype of the AMD Radeon HD 6000 series "Cayman" graphics card. This particular card is reportedly the "XT" variant, or what will go on to be the HD 6x70, which is the top single-GPU SKU based on AMD's next-generation "Cayman" performance GPU. The picture reveals a card that appears to be roughly the size of a Radeon HD 5870, with a slightly more complex-looking cooler. The PCB is red in color, and the display output is slightly different compared to the Radeon HD 5800 series: there are two DVI, one HDMI, and two mini-DisplayPort connectors. The specifications of the GPU remain largely unknown, except it's being reported that the GPU is built on the TSMC 40 nm process. The refreshed Radeon HD 6000 series GPU lineup, coupled with next-generation Bulldozer architecture CPUs and Fusion APUs are sure to make AMD's lineup for 2011 quite an interesting one.Update (9/9): A new picture of the reverse side of the PCB reveals 8 memory chips (256-bit wide memory bus), 6+2 phase VRM, and 6-pin + 8-pin power inputs.

The first official die-shots of the first Bulldozer architecture derivative, the eight-core "Orochi" Opteron die was displayed at Global Technology Conference, by GlobalFoundries, AMD's principal foundry-partner. While AMD did not give out a die-map to go with it, the structures we can make out are four Bulldozer modules holding two cores and a shared L2 cache each, a L3 cache spread across four blocks that's shared between all cores, the northbridge-portion cutting across the die at the center, and the integrated memory controller along its far-right side. Various I/O portions are located along the other three sides.

Next up is the Llano die. This is AMD's very first Fusion APU (accelerated processing unit) die. It is based on the K10 architecture and integrates a graphics processor and northbridge completely into one die. It precedes APUs based on the Bobcat architecture. Fortunately, there is a die-map at hand, which shows four K10 cores with dedicated 1 MB L2 caches per core, no L3 cache, an integrated SIMD array that holds 480 stream processors. The GPU component is DirectX 11 compliant. Other components include an integrated northbridge, integrated memory controller, integrated PCI-Express root complex, and HyperTransport interface to the chipset.

AMD is finally going to embrace a truly next generation x86 processor architecture that is built from ground up. AMD's current architecture, the K10(.5) "Stars" is an evolution of the more market-successful K8 architecture, but it didn't face the kind of market success as it was overshadowed by competing Intel architectures. AMD codenamed its latest design "Bulldozer", and it features an x86 core design that is radically different from anything we've seen from either processor giants. With this design, AMD thinks it can outdo both HyperThreading and Multi-Core approaches to parallelism, in one shot, as well as "bulldoze" through serial workloads with a broad 8 integer pipeline per core, (compared to 3 on K10, and 4 on Westmere). Two almost-individual blocks of integer processing units share a common floating point unit with two 128-bit FMACs.

AMD is also working on a multi-threading technology of its own to rival Intel's HyperThreading, that exploits Bulldozer's branched integer processing backed by shared floating point design, which AMD believes to be so efficient, that each SMT worker thread can be deemed a core in its own merit, and further be backed by competing threads per "core". AMD is working on another micro-architecture codenamed "Bobcat", which is a downscale implementation of Bulldozer, with which it will take on low-power and high performance per Watt segments that extend from all-in-One PCs all the way down to hand-held devices and 8-inch tablets. We will explore the Bulldozer architecture in some detail.

At the GigaOm Structure Cloud Computing and Internet Infrastructure conference, AMD today announced availability of the new AMD Opteron 4000 Series platform. This is the first server platform designed from the beginning to meet the specific requirements of cloud, hyperscale data center, and SMB customers needing highly flexible, reliable, and power-efficient 1 and 2P systems. This platform is also available for high-end embedded systems such as telecom servers, storage, and digital signage, through AMD Embedded Solutions. Systems from Acer Group, Dell, HP, SGI, Supermicro, ZT Systems, and numerous other channel partners are expected beginning today and in the coming months.

AMD announces availability of a new server platform featuring the world's first 8- and 12-core x86 processor for the high-volume 2P and value 4P server market. The AMD Opteron 6000 Series platform addresses the unmistakable needs of server customers today - workload-specific performance, power efficiency, and overall value - while delivering more cores and more memory for less money. Leading OEMs including HP, Dell, Acer Group, Cray, and SGI are introducing new systems based on this highly scalable and reliable platform.

"As AMD has done before, we are again redefining the server market based on current customer requirements," said Patrick Patla, vice president and general manager, Server and Embedded Divisions, AMD. "The AMD Opteron 6000 Series platform signals a new era of server value, significantly disrupts today's server economics and provides the performance-per-watt, value and consistency customers demand for their real-world data center workloads."

As part of its Financial Analyst Day for 2009, AMD listed out its priorities for the year ahead, looking into 2010. While the company has lived up to its development targets for this year by releasing a full-fledged lineup of PC and server processors built on the 45 nm process, increasing its market share with graphics products, and releasing the first DirectX 11 compliant (back then referred to as 'next generation') GPU, the year ahead looks equally ambitious for AMD.

AMD set the following product priorities for 2010: to deliver four new winning PC platforms in the first half of 2010, improve battery life of its notebook platform, expand homegrown DirectCompute 11 and OpenCL developer tools, propagate DirectX 11 graphics to notebooks, launch the company's first 12-core Opteron processor, and more interestingly, sample the company's next-generation "Bulldozer" architecture to industry customers, along with sampling the company's first Fusion-design "Bobcat" processor, which integrates the CPU with GPU, along with sampling some of the company's first processors built on the 32 nm manufacturing process.

Earlier slated coarsely for 2010, AMD fine-tuned the expected release time-frame of its 12-core "Magny-Cours" Opteron processors to be within Q1 2010. The company seems to be ready with the processors, and has demonstrated a 4 socket, 48 core machine based on these processors. Magny Cours holds symbolism in being one of the last processor designs by AMD before it moves over to "Bulldozer", the next processor design by AMD built from ground-up. Its release will provide competition to Intel's multi-core processors available at that point.

AMD's Pat Conway at the IEEE Hot Chips 21 conference presented the Magny-Cours design that include several key design changes that boost parallelism and efficiency in a high-density computing environment. Key features include: Move to socket G34 (from socket-F), 12-cores, use of a multi-chip module (MCM) package to house two 6-core dies (nodes), quad-channel DDR3 memory interface, and HyperTransport 3 6.4 GT/s with redesigned multi-node topologies. Let's put some of these under the watch-glass.

AMD kept up with the SIMD processing standards Intel set by licensing its popular CPU instruction sets such as MMX, SSE, SSE2, and SSE3. The three were used as is by AMD, except for that AMD chose not to conform completely with Supplemental SSE3, SSE4 and its revisions (SSE4.1, SSE4.2). The company devised the SSE4A instruction set to feature with its K10 micro-architecture. SSE4A is a lighter version that features LZCNT (Leading Zero Count), POPCNT (bit population count), EXTRQ/INSERTQ and MOVNTSD/MOVNTSS (Scalar streaming store instructions). What's more, the company even decided back in 2007 that it would come up with SSE5, that then Intel sought to leave development with AMD.

In due course of time, Intel started development of AVX (Advanced Vector eXtensions) that enhances processing of FPU-intensive workloads. AMD gained interest in this technology, and is looking to make it compatible with the originally-conceived SSE5. The instructions that remain as part of the superset that doesn't include AVX is now referred to by AMD as XOP (eXtended OPerations). In addition to this, AMD will include FMA4 (Floating point vector Multiply-Accumulate). The new instruction sets make it to AMD's next-generation Bulldozer micro-architecture slated for 2011. Meanwhile, Intel's AVX makes it to the Sandy Bridge micro-architecture slated for 2010~11. AMD published the Programmer's Manual document on 128-Bit and 256-Bit XOP, FMA4 and CVT16 Instructions, which can be read here (PDF).

Having recently made its plans with the server market public, AMD demonstrated a 4-socket server featuring four 12-core, next-generation Opteron processors. That's 48 cores in all. The company has pulled its six-core Istanbul Opteron processors' launch from H2 2008 to Q2 2008, and is set to launch its Opteron 6000 series processors based on the "Magny Cours" architecture in 2010.

Processors in the series come with 8 or 12 cores. The company seems to be ready with a few of these, enough to put together a 4-socket demo system. While AMD did not run any benchmarks on the system, it managed to draw some attention due to the fact that there hasn't been so much parallelism in a 4-way server till date. On the course of its 2010 launch, the company may hold more demonstrations, perhaps with benchmarks to show how the platform compares to competing solutions from rival Intel. The "Magny Cours" processor will be the first in line for the company's G34 "Maranello" platform for AMD Opteron 6000 series processors with up to 16 cores, 4 sockets, and quad-channel memory interfaces per socket. The 16-core processor in the making is slated for 2011, is based on the Bulldozer architecture, and will be built on the 32 nm process.

AMD wants to leave the Barcelona (rather K10) debacle behind it as it moves closer to a newer processor architecture. This paves way for AMD to incorporate strong memory and system interface links. The G34 socket though touted to be a successor for the current socket 1207, is believed to be a standard socket for both enterprise and PC processors. AMD is working on a new CPU architecture codenamed 'Bulldozer'. Derivatives include monolithic 8-core and 12-core processors. The 12-core processor is now codenamed Magny-Cours, the 8-core part is called Sao Paulo. These processors could feature four parallel HyperTransport 3.0 interconnects, upto 12 MB of L3 cache and 512 KB L2 cache per core. It's known that AMD could be working on quad-channel DDR3 (both registered DDR3 under G3MX and unregistered). Socket G34 seems to have 1,974 pins.

The provision of four independent HyperTransport interconnects means that the fourth interconnect can be dedicated as a peer-to-peer interconnect between two sockets in a dual-socket setup, or its bandwidth split to form daisy-chains with multiple sockets. A prelude to AMD's Torrenza enterprise platform, which would allow use of several co-processors of different architectures including ClearSpeed to be embedded in workstations.

AMD today announced further plans to innovate the x86 architecture by introducing SSE5, a new extension of the x86 instruction set that is designed to allow software developers to simplify code and achieve greater efficiency for the most performance-hungry applications. SSE5 will give developers additional capabilities to help maximize the performance of applications that have daily impact on consumers and enterprises, including high performance computing, multimedia and security applications.