According to a recent investigative report, UK-based Imagination Technologies faces allegations of transferring sensitive GPU intellectual property to Chinese companies with potential military connections. The UK-China Transparency organization claims that following its 2020 acquisition by China-controlled investment firm Canyon Bridge, Imagination provided complete access to its GPU IP to Chinese entities with military connections. The report suggests this included sharing detailed architectural documentation typically reserved for premier clients like Apple. At the center of the controversy are Chinese firms Moore Threads and Biren Technology, which have emerged as significant players in China's AI and GPU sectors. The report indicates Moore Threads maintains connections with military GPU suppliers, while Biren Technology has received partial Russian investment.

The organization argues that Canyon Bridge, which has ties to the state-owned China Reform enterprise, helped these technological transfers to benefit China's military-industrial complex. Imagination Technologies has defended its actions, maintaining that all licensing agreements comply with industry standards. The allegations have sparked renewed debate about foreign ownership of strategic technology assets and the effectiveness of current export controls. When Canyon Bridge acquired Imagination in 2020, security experts raised concerns about potential military applications of the firm's technology. UKCT plans to release additional findings, including information from legal disputes involving Imagination's previous management. Rising concerns over technology transfers have prompted governments to reassess export controls and corporate oversight in the semiconductor industry, as nations struggle to balance international commerce with national security priorities. We are yet to see official government response to this situation.

Micron Technology, Inc. today announced results for its first quarter of fiscal 2025, which ended November 28, 2024.

Fiscal Q1 2025 highlights

• Revenue of $8.71 billion versus $7.75 billion for the prior quarter and $4.73 billion for the same period last year
• GAAP net income of $1.87 billion, or $1.67 per diluted share
• Non-GAAP net income of $2.04 billion, or $1.79 per diluted share
• Operating cash flow of $3.24 billion versus $3.41 billion for the prior quarter and $1.40 billion for the same period last year

"Micron delivered a record quarter, and our data center revenue surpassed 50% of our total revenue for the first time," said Sanjay Mehrotra, President and CEO of Micron Technology. "While consumer-oriented markets are weaker in the near term, we anticipate a return to growth in the second half of our fiscal year. We continue to gain share in the highest margin and strategically important parts of the market and are exceptionally well positioned to leverage AI-driven growth to create substantial value for all stakeholders."

Nanya Technology's Board of Directors today has approved a strategic partnership with PieceMakers Technology, Inc. ("PieceMakers") to jointly develop customized ultra-high-bandwidth memory solutions. As part of the collaboration, Nanya Technology will subscribe to a cash capital increase of up to NT$ 660 million, purchasing up to 22 million common shares at NT$ 30 per share in PieceMakers. Upon completion of the capital increase, Nanya Technology is expected to acquire up to approximately 38% stakes of PieceMakers.

To meet the growing demand for high-performance memory driven by AI and edge computing, this collaboration will combine Nanya Technology's 10 nm-class DRAM innovation with PieceMakers' expertise in customized DRAM design to develop high-value, high-performance, and low-power customized ultra-high-bandwidth memory solutions, unlocking new opportunities in AI and high-performance computing markets.

NVIDIA's RTX 5000 series GPU hardware has been leaked repeatedly in the weeks and months leading up to CES 2025, with previous leaks tipping significant updates for the RTX 5070 Ti in the VRAM department. Now, Inno3D is apparently hinting that the RTX 5000 series will also introduce updated machine learning and AI tools to NVIDIA's GPU line-up. An official CES 2025 teaser published by Inno3D, titled "Inno3D At CES 2025, See You In Las Vegas!" makes mention of potential updates to NVIDIA's AI acceleration suite for both gaming and productivity.

The Inno3D teaser specifically points out "Advanced DLSS Technology," "Enhanced Ray Tracing" with new RT cores, "better integration of AI in gaming and content creation," "AI-Enhanced Power Efficiency," AI-powered upscaling tech for content creators, and optimizations for generative AI tasks. All of this sounds like it builds off of previous NVIDIA technology, like RTX Video Super Resolution, although the mention of content creation suggests that it will be more capable than previous efforts, which were seemingly mostly consumer-focussed. Of course, improved RT cores in the new RTX 5000 GPUs is also expected, although it will seemingly be the first time NVIDIA will use AI to enhance power draw, suggesting that the CES announcement will come with new features for the NVIDIA App. The real standout feature, though, are called "Neural Rendering" and "Advanced DLSS," both of which are new nomenclatures. Of course, Advanced DLSS may simply be Inno3D marketing copy, but Neural Rendering suggests that NVIDIA will "Revolutionize how graphics are processed and displayed," which is about as vague as one could be.

Today at the IEEE International Electron Devices Meeting (IEDM) 2024, Intel Foundry unveiled new breakthroughs to help drive the semiconductor industry forward into the next decade and beyond. Intel Foundry showcased new material advancements that help improve interconnections within a chip, resulting in up to 25% capacitance by using subtractive ruthenium. Intel Foundry also was first to report a 100x throughput improvement using a heterogeneous integration solution for advanced packaging to enable ultra-fast chip-to-chip assembly. And to further drive gate-all-around (GAA) scaling, Intel Foundry demonstrated work with silicon RibbonFET CMOS and with gate oxide module for scaled 2D FETs for improved device performance.

"Intel Foundry continues to help define and shape the roadmap for the semiconductor industry. Our latest breakthroughs underscore the company's commitment to delivering cutting-edge technology developed in the U.S., positioning us well to help balance the global supply chain and restore domestic manufacturing and technology leadership with the support of the U.S. CHIPS Act," says Sanjay Natarajan, Intel senior vice president and general manager of Intel Foundry Technology Research.

Broadcom Inc. today announced the availability of its 3.5D eXtreme Dimension System in Package (XDSiP) platform technology, enabling consumer AI customers to develop next-generation custom accelerators (XPUs). The 3.5D XDSiP integrates more than 6000 mm² of silicon and up to 12 high bandwidth memory (HBM) stacks in one packaged device to enable high-efficiency, low-power computing for AI at scale. Broadcom has achieved a significant milestone by developing and launching the industry's first Face-to-Face (F2F) 3.5D XPU.

The immense computational power required for training generative AI models relies on massive clusters of 100,000 growing to 1 million XPUs. These XPUs demand increasingly sophisticated integration of compute, memory, and I/O capabilities to achieve the necessary performance while minimizing power consumption and cost. Traditional methods like Moore's Law and process scaling are struggling to keep up with these demands. Therefore, advanced system-in-package (SiP) integration is becoming crucial for next-generation XPUs. Over the past decade, 2.5D integration, which involves integrating multiple chiplets up to 2500 mm² of silicon and HBM modules up to 8 HBMs on an interposer, has proven valuable for XPU development. However, as new and increasingly complex LLMs are introduced, their training necessitates 3D silicon stacking for better size, power, and cost. Consequently, 3.5D integration, which combines 3D silicon stacking with 2.5D packaging, is poised to become the technology of choice for next-generation XPUs in the coming decade.

Marvell Technology, Inc., a leader in data infrastructure semiconductor solutions, today introduced Marvell Ara, the industry's first 3 nm 1.6 Tbps PAM4 interconnects platform featuring 200 Gbps electrical and optical interfaces. Building on the success of the Nova 2 DSP, the industry's first 5 nm 1.6 Tbps PAM4 DSP with 200 Gbps electrical and optical interfaces, Ara leverages the comprehensive Marvell 3 nm platform with industry-leading 200 Gbps SerDes and integrated optical modulator drivers, to reduce 1.6 Tbps optical module power by over 20%. The energy efficiency improvement reduces operational costs and enables new AI server and networking architectures to address the need for higher bandwidth and performance for AI workloads, within the significant power constraints of the data center.

Ara, the industry's first 3 nm PAM4 optical DSP, builds on six generations of Marvell leadership in PAM4 optical DSP technology. It integrates eight 200 Gbps electrical lanes to the host and eight 200 Gbps optical lanes, enabling 1.6 Tbps in a compact, standardized module form factor. Leveraging 3 nm technology and laser driver integration, Ara reduces module design complexity, power consumption and cost, setting a new benchmark for next-generation AI and cloud infrastructure.

Santa Clara, CA: Tenstorrent is announcing that it has closed over $693M in its Series D funding round at a pre-money valuation of $2B. Samsung Securities and AFW Partners led the round, which was oversubscribed due to strong demand from investors. Samsung and AFW both have deep relationships with Tenstorrent, and a strong history of investing in pioneering technology companies.

In addition to the leads, many notable investors joined the round including XTX Markets, Corner Capital, MESH, Export Development Canada, Healthcare of Ontario Pension Plan, LG Electronics, Hyundai Motor Group, Fidelity, Baillie Gifford, Bezos Expeditions, and more.

Taiwanese political officials have agreed to discuss transferring TSMC's advanced 2 nm chip technology to allied democratic nations, but only after establishing the main mass production launch in late 2025 in Taiwan. This new stance comes amid growing international pressure and recent comments from upcoming US president Donald Trump about semiconductor manufacturing. The announcement by National Science and Technology Council Minister Cheng-Wen Wu marks a notable departure from earlier statements by Economic Affairs Minister J.W. Kuo, who had previously emphasized legal restrictions on transferring leading-edge process technology overseas. Interestingly, these different positions aren't so different from one point: timeline of node deployments. As TSMC produces latest nodes in Taiwan, overseas production will lag by a generation or two.

TSMC plans to implement its 2 nm technology in US facilities by 2030. The company's Arizona facility, Fab 21, will begin with less advanced N4 and N5 processes in early 2025 and progress to 3 nm technology by 2028. However, this timeline could face pressure for acceleration, mainly if new trade policies are implemented. Industry analyst Dan Nystedt points out significant challenges in transferring advanced chip production. Integrating research and development with manufacturing processes in Taiwan provides crucial advantages for initial production ramps, making simultaneous mass production launches in multiple locations technically challenging. Simply put, there aren't enough capable engineers, scientists, and factory workers capable of doing what TSMC accomplishes in Taiwan.

Samsung Electronics today announced new leadership for the next phase of the Company's growth and to strengthen its future competitiveness, focusing on the semiconductor business.

Young Hyun Jun, Vice Chairman and Head of Device Solutions (DS) Division, was named CEO and will also become the Head of Memory Business and Samsung Advanced Institute of Technology. Jinman Han was promoted to President and will become the Head of Foundry Business, while Seok Woo Nam will become Chief Technology Officer of Foundry Business, a newly-created position.

Smartkem, positioned to power the next generation of displays using its disruptive organic thin-film transistors (OTFTs), has partnered with AUO, the largest display manufacturer in Taiwan, to jointly develop the world's first advanced rollable, transparent microLED display using Smartkem's technology.

"We believe that collaborating with global display industry leader AUO to develop a novel microLED display puts Smartkem's technology on the frontier of microLED display commercialization. Our unique transistor technology is expected to enable display manufacturers to efficiently produce microLED displays, making mass production commercially viable. Smartkem's technology has the potential to take today's microLED TVs from high end market prices of $100,000 down to mass market prices," stated Ian Jenks, Smartkem Chairman and CEO.

AMD has recently filed a patent revealing plans to implement "multi-chip stacking" in future Ryzen SoCs, as Wccftech reports, quoting a post on X from @coreteks: "New patent from AMD shows how future Zen SoCs could look. Basically a novel packaging design that enables compact chip stacking and interconnection by having them partially overlap, as in this figure. The dotted line is a larger die stacked on top of those smaller ones". The patent details a new approach where smaller chiplets partially overlap with a larger die, creating space for additional components and functions on the same die. This strategy aims to improve the efficiency of the contact area, thus making room for higher core counts, larger caches, and increased memory bandwidth within the same die size. The proposed stacking will reduce the physical distance between components through overlapping chiplets, thus minimizing interconnect latency and achieving faster communication between different chip parts. The design will also improve power management, as the segregated chiplets allow for better control of each unit through power gating.

Even if long-time rival Intel has lost some of its momentum (and market share) this year, AMD's chance to push ahead with its intention to become number one in the market is to continue to innovate. In the same way that its 3D V-Cache technology made the X3D processor lineup so successful, this chip stacking approach could play a major role in future AMD Ryzen SoCs. It seems that AMD is committed to moving away from the monolithic design era and taking the road of multi-chiplet; however, it can be a long wait until (and if) this chip stacking will complete the journey from patents to design, production, and final product.

For over half a century, general-purpose processors have been built on the Tomasulo algorithm, developed by IBM engineer Robert Tomasulo in 1967. It's a $500B industry built on specialized CPU, GPU and other chips for different computing tasks. Hardware startup Ubitium has shattered this paradigm with a breakthrough universal processor that handles all computing workloads on a single, efficient chip - unlocking simpler, smarter, and more cost-effective devices across industries - while revolutionizing a 57-year-old industry standard.

Alongside this, Ubitium is announcing a $3.7 million in seed funding round, co-led by Runa Capital, Inflection, and KBC Focus Fund. The investment will be used to develop the first prototypes and prepare initial development kits for customers, with the first chips planned for 2026.

Applied Materials, Inc. today introduced the MAX OLED solution, a patented OLED pixel architecture and revolutionary display manufacturing technology designed to bring the superior OLED displays found in high-end smartphones to tablets, PCs and eventually TVs.

OLED is the display technology of choice for the world's leading smartphone manufacturers because it offers superior display quality, light and flexible form factors, and durability. However, until today, it has proven challenging to scale OLED display manufacturing to the larger glass panels used to make displays for tablets, PCs and TVs.

d-Matrix today unveiled Corsair, an entirely new computing paradigm designed from the ground-up for the next era of AI inference in modern datacenters. Corsair leverages d-Matrix's innovative Digital In-Memory Compute architecture (DIMC), an industry first, to accelerate AI inference workloads with industry-leading real-time performance, energy efficiency, and cost savings as compared to GPUs and other alternatives.

The emergence of reasoning agents and interactive video generation represents the next level of AI capabilities. These leverage more inference computing power to enable models to "think" more and produce higher quality outputs. Corsair is the ideal inference compute solution with which enterprises can unlock new levels of automation and intelligence without compromising on performance, cost or power.

JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JESD230G: NAND Flash Interface Interoperability Standard. JESD230G introduces speeds of up to 4800 MT/s, as compared to 400 MT/s in the first version of JESD230 published in 2011. Also, JESD230G adds a separate Command/Address Bus Protocol (SCA), delivering enhanced throughput and efficiency by allowing hosts and NAND devices to take maximum advantage of the latest interface speeds. JESD230G is available for free download from the JEDEC website.

"JEDEC is excited to release JESD230G," said David Landsman, Distinguished Engineer at Western Digital and Chair of the JEDEC NAND TG. He added, "This version of JESD230 further advances the capabilities of NAND flash devices to meet the growing demands of their expanding range of applications and continues the JEDEC tradition of building interoperable ecosystems through open industry standards."

QSAN Technology Inc., a leading provider of innovative storage solutions, is thrilled to announce the latest update to its enterprise NAS product line with enterprise unified storage manager - QSM 4, designed to set new standards for performance and management. The XN8100R and XN5100R series (single controller models) now deliver significantly enhanced capabilities for today's data-intensive business environments.

Enhanced Performance for Greater Efficiency with Enterprise NAS
QSAN's XCubeNAS models with the newly developed QFS (QSAN File System) demonstrate up to 10x faster data access than QSM 3 models. The high-core models of the XN8100R series work with SD4 NVMe SSD to further optimize latency and IOPS, delivering exceptional responsiveness and high-speed data access.

The CHERI Alliance CIC (Community Interest Company) today announced its official launch and the expansion of its membership, welcoming Chevin Technology (UK), Critical Technologies (USA), the Defence Science and Technology Laboratory (DSTL, UK), Google (USA), Light Momentum Technology Corporation (Taiwan), National Cyber Security Centre (NCSC, a part of GCHQ, UK), Parvat Infotech (India), SRI International (USA), TechWorks (UK), Trusted Computer Center of Excellence (USA), the University of Birmingham (UK), and the University of Glasgow (UK) as founding members.

Founded to unite hardware security leaders and system developers, the CHERI Alliance aims to establish CHERI (Capability Hardware Enhanced RISC Instructions) as the new standard for memory safety and scalable software compartmentalization.

At AAEON Technology, we recognize growing demand for secure and reliable industrial systems. In collaboration with Canonical, AAEON Technology validates Ubuntu Pro across our Intel-based industrial systems. Each unit comes with a preinstalled Ubuntu image, an Ubuntu Pro license sticker, and 10 years of Canonical-backed updates for ongoing security and maintenance. "This collaboration means our customers benefit from cutting-edge hardware paired with the secure, long-term support offered with Ubuntu Pro enabled. With ongoing updates, they're always protected, allowing them to focus on their core goals," said Victor Lai, Managing Director at AAEON.

Ubuntu Pro provides enterprise-level security, compliance, and long-term stability for industrial and edge applications. It meets strict regulatory standards while delivering high performance in demanding environments.

LG Display, the world's leading innovator of display technologies, announced today its unveiling of the world's first Stretchable display capable of expanding up to 50%, the highest rate of elongation in the industry. At LG Science Park in Seoul on Nov. 8, the company demonstrated the panel at a meeting of more than 100 South Korean industry, academia, and research stakeholders involved in a Stretchable display national project.

Stretchable displays are seen as the ultimate free-form screen technology because they can be freely transformed into any shape, including by stretching, folding, and twisting.

The 8th edition of the Samsung AI Forum was held on November 4th and 5th in Seoul, and among all the presentations and keynote speeches, one piece of information caught our attention. As reported by The Chosun Daily, Samsung is (again) turning its attention to Processing-in-Memory (PIM) technology, in what appears to be the company's latest attempt to keep up with its rival SK Hynix in this area. In 2021, Samsung introduced the world's first HBM-PIM, the chips showing impressive gains in performance (nearly double) while reducing energy consumption by almost 50% on average. PIM technology basically adds the processor functions necessary for computational tasks, reducing data transfer between the CPU and memory.

Now, the company hopes that PIM memory chips could replace HBM in the future, based on the advantages this next-generation memory technology possesses, mainly for artificial intelligence (AI) applications. "AI is transforming our lives at an unprecedented rate, and the question of how to use AI more responsibly is becoming increasingly important," said Samsung Electronics CEO Han Jong-hee in his opening remarks. "Samsung Electronics is committed to fostering a more efficient and sustainable AI ecosystem." During the event, Samsung also highlighted its partnership with AMD, which reportedly supplies AMD with its fifth-generation HBM, the HBM3E.

Today, the Department of Commerce and Natcast, the operator of the National Semiconductor Technology Center (NSTC), announced the expected location for the first CHIPS for America research and development (R&D) flagship facility. The CHIPS for America Extreme Ultraviolet (EUV) Accelerator, an NSTC facility (EUV Accelerator), is expected to operate within NY CREATES' Albany NanoTech Complex in Albany, New York, supported by a proposed federal investment of an estimated $825 million. The EUV Accelerator will focus on advancing state of the art EUV technology and the R&D that relies on it.

As a key part of President Biden's Investing in America agenda, CHIPS for America is driven by the growing need to bolster the U.S. semiconductor supply chain, accelerate U.S. leading-edge R&D, and create good quality jobs around the country. This proposed facility will bring together NSTC members from across the ecosystem to accelerate semiconductor R&D and innovation by providing NSTC members access to technologies, capabilities, and critical resources.

Samsung is currently mass-producing its 9th generation V-NAND flash memory chips with 286 layers unveiled this April. According to the Korean Economic Daily, the company targets V-NAND memory chips with at least 400 stacked layers by 2026. In 2013, Samsung became the first company to introduce V-NAND chips with vertically stacked memory cells to maximize capacity. However, stacking beyond 300 levels proved to be a real challenge with the memory chips getting frequently damaged. To address this problem, Samsung is reportedly developing an improved 10th-generation V-NAND that is going to use the Bonding Vertical (BV) NAND technology. The idea is to manufacture the storage and peripheral circuits on separate layers before bonding them vertically. This is a major shift from the current Co-Packaged (CoP) technology. Samsung stated that the new method will increase the density of bits per unit area by 1.6 times (60%), thus leading to increased data speeds.

Samsung's roadmap is truly ambitious, with plans to launch the 11th generation of NAND in 2027 with an estimated 50% improvement in I/O rates, followed by 1,000-layer NAND chips by 2030. Its competitor, SK hynix, is also working on 400-layer NAND aiming to have the technology ready for mass production by the end of 2025, as we previously mentioned in August. Samsung, the current HBM market leader with a 36.9% market share have also plans for its DRAM sector intending to introduce the sixth-generation 10 nm DRAM, or 1c DRAM by the first half of 2025. Then we can expect to see Samsung's seventh-generation 1d nm (still on 10 nm) in 2026, and by 2027 the company hopes to release its first generation sub-10 nm DRAM, or 0a DRAM memory that will use a Vertical Channel Transistor (VCT) 3D structure similar to what NAND flash utilizes.

Kingston Technology Company, Inc., a world leader in memory products, announced the upcoming release of Kingston FURY Renegade DDR5 CUDIMMs, compatible with Intel's new 800-series chipset (formerly codenamed Arrow Lake). Intel's 800-series chipset is the first platform to utilize Clock Drivers on CUDIMMs (Clocked Unbuffered Dual Inline Memory Modules). At 6400 MT/s DDR5, JEDEC mandates the inclusion of a Client Clock Driver (CKD) on UDIMMs and SODIMMs. This component buffers and redrives the clock signal from the processor, enhancing signal integrity to the module. To distinguish these advanced modules from standard DDR5 UDIMMs and SODIMMs, JEDEC has designated them as CUDIMMs and CSODIMMs, respectively.

Kingston FURY Renegade RGB and non-RGB CUDIMM modules start at an overclocked speed of 8400 MT/s and are available as 24 GB single modules and 48 GB dual channel kits. Since CUDIMMs and UDIMMs share the same 288-pin connector, Kingston FURY UDIMMs with XMP and EXPO profiles are also compatible with Intel 800-series motherboards. However, it's recommended to verify compatibility through the motherboard manufacturer's QVL (Qualified Vendor List) or by checking the Kingston Configurator for supported speeds and capacities.

Seagate Technology Holdings plc (NASDAQ: STX) (the "Company" or "Seagate"), a leading innovator of mass-capacity data storage, today reported financial results for its fiscal first quarter ended September 27, 2024. "Seagate is off to an outstanding start to the fiscal year, highlighted by gross margin expanding to the highest level in more than a decade," said Dave Mosley, Seagate's chief executive officer.

"We executed on our plans to aggressively ramp our 28-terabyte nearline drives and broaden the number of cloud customers entering qualification on HAMR-based Mozaic products. We are excited by the strong product momentum which positions us well to address customer demand while delivering profitable growth. Our confidence in Seagate's future opportunities is reflected in the decision to raise the quarterly dividend as announced today," Mosley concluded.