The memory SPD contains three CL ratings. These do not seem to be specifically picked, but are rather usual settings. 5-5-5-15 followed by 6-6-6-18 and 8-8-8-24. The RAS# Precharge is always triple the CL rating. Other manufactures go into greater detail and try to set tighter timings for this value. The three settings do hold a good base for each CL rating though. If you want to know how far a memory will go at each setting simply configure the specific speed in the BIOS. It would have been great if Aeneon would have also added a CL7-7-7-21 SPD.
The memory is rated for default 1.5V, so it was set at 1333 MHz in the BIOS with a 333 MHz FSB. This FSB rating was always used as a base to keep the CPU performance similar in each test runs, so that we can focus on the impact of performance with higher memory speeds. The PCIe clock was locked at 100 and the multiplier of the CPU was lowered to 6 instead of 7, to make sure that the CPU would not become the limiting factor. After running our benchmarks at this speed, we pushed the memory starting at 1.5V to its limit, slowly raising the Voltage by 0.1V steps up to 2.0V after each successful run.
The memory was tested at CL5-5-5-15, 6-6-6-18, 7-7-7-21 and 8-8-8-24. While it is possible to go higher with CL9 or CL10, it does not really serve any purpose, as such loose settings translate into slower performance. All milestones were benchmarked, as well as the highest possible at standard 1.5V or 2.0V - the maximum voltage one should use for DDR3 with sufficient cooling. It should be noted that Aeneon nowhere explicitly warrants "overvolted" memory. So you will use such settings at your own risk.
Wit the Aeneon DDR3 memory it became apparent quite fast, that voltage has no real impact on performance. The difference of maximum speed and any given CL rating between 1.5V or 2.0V operation is always somewhere in the range of 20 - 25 MHz. We were only able to push the memory further when the timings were relaxed.
Aeneon X-Tune DDR3 1333 MHz CL8-8-8-24
CPU Clock Memory Ratio
Memory Speed
Memory Timings
Everest Read
Everest Write
Everest Latency
Quake 3 Timedemo
3DMark 2001SE
SuperPi Mod 1M
6 x 333 1:2
667 MHz
8-8-8-24 1.5V
7662 MB/s
5331 MB/s
69.9 ns
229.4 fps
24672
26.64 s
6 x 370 1:2
741 MHz
8-8-8-24 1.5V
8505 MB/s
5919 MB/s
62.9 ns
253.1 fps
26210
24.00 s
6 x 376 1:2
751 MHz
8-8-8-24 2.0V
8633 MB/s
5999 MB/s
62.1 ns
256.5 fps
26179
23.68 s
6 x 333 5:8
534 MHz
7-7-7-21 1.5V
7281 MB/s
5321 MB/s
71.5 ns
228.0 fps
24670
26.78 s
6 x 375 5:8
600 MHz
7-7-7-21 1.5V
8171 MB/s
5977 MB/s
63.7 ns
256.1 fps
26141
23.84 s
6 x 394 5:8
630 MHz
7-7-7-21 1.5V
8091 MB/s
6273 MB/s
65.6 ns
267.4 fps
26526
22.82 s
6 x 405 5:8
649 MHz
7-7-7-21 2.0V
8340 MB/s
6461 MB/s
63.5 ns
275.8 fps
26902
22.17 s
6 x 356 2:3
534 MHz
6-6-6-18 1.5V
7343 MB/s
5666 MB/s
72.0 ns
240.9 fps
25192
25.25 s
6 x 363 2:3
544 MHz
6-6-6-18 1.5V
7384 MB/s
5788 MB/s
73.3 ns
245.5 fps
25391
24.78 s
6 x 369 2:3
553 MHz
6-6-6-18 2.0V
7447 MB/s
5884 MB/s
72.0 ns
250.0 fps
25570
24.40 s
6 x 368 5:6
442 MHz
5-5-5-15 1.5V
6720 MB/s
5846 MB/s
78.6 ns
245.9 fps
25280
24.78 s
6 x 378 5:6
454 MHz
5-5-5-15 2.0V
6951 MB/s
6024 MB/s
76.3 ns
254.5 fps
25681
24.01 s
The voltage scaling graph illustrates the afore mentioned lack of performance gain with higher voltage. The DIMMs only react to a change in latency. The modules max out at just over 1500 MHz at CL8 and 2.0V. This is quite respectable, considering a solid 12% boost at 2.0V. Remember that your milage may vary and this just reflects the performance of the samples.