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Kioxia Exceria Plus G2 500 GB

500 GB
Capacity
Phison E12S
Controller
TLC
Flash
PCIe 3.0 x4
Interface
M.2 2280
Form Factor
SSD Controller
Controller
NAND Die
NAND Die
The Kioxia Exceria Plus G2 is a solid-state drive in the M.2 2280 form factor, launched on June 3rd, 2024. It is available in capacities ranging from 500 GB to 2 TB. This page reports specifications for the 500 GB variant. With the rest of the system, the Kioxia Exceria Plus G2 interfaces using a PCI-Express 3.0 x4 connection. The SSD controller is the PS5012-E12S-32 from Phison. Kioxia has installed 96-layer TLC NAND flash on the Exceria Plus G2, the flash chips are made by Toshiba. To improve write speeds, a pseudo-SLC cache is used, so bursts of incoming writes are soaked up more quickly. The Exceria Plus G2 is rated for sequential read speeds of up to 3,400 MB/s and 3,200 MB/s write; random IOPS reach up to 650K for reads and 600K for writes.
At its launch, the SSD was priced at 65 USD. The warranty length is set to five years, which is an excellent warranty period. Kioxia guarantees an endurance rating of 200 TBW, a relatively low value compared to other SSDs.

Solid-State-Drive

Capacity: 500 GB
Variants: 500 GB 1 TB 2 TB
Overprovisioning: 46.3 GB / 10.0 %
Production: Active
Released: Jun 3rd, 2024
Price at Launch: 65 USD
Part Number: LRD20Z500GG8
Market: Consumer

Physical

Form Factor: M.2 2280 (Single-Sided)
Interface: PCIe 3.0 x4
Protocol: NVMe 1.3
Power Draw: Unknown (Idle)
Unknown (Avg)
6.7 W (Max)

Controller

Manufacturer: Phison
Name: PS5012-E12S-32
Architecture: ARM 32-bit Cortex-R5
Core Count: Quad-Core
Frequency: 667 MHz
Foundry: TSMC
Process: 12 nm
Flash Channels: 8 @ 667 MT/s
Chip Enables: 4
Controller Features: DRAM

NAND Flash

Manufacturer: Toshiba
Name: BiCS4
Type: TLC
Technology: 96-layer
Speed: 533 MT/s .. 800 MT/s
Capacity: 8 chips @ 512 Gbit
Toggle: 3.0
Topology: Charge Trap
Process: 19 nm
Dies per Chip: 2 dies @ 256 Gbit
Planes per Die: 2
Decks per Die: 2
Word Lines: 109 per NAND String
88.1% Vertical Efficiency
Read Time (tR): 59 µs
Program Time (tProg): 625 µs
Die Read Speed: 551 MB/s
Die Write Speed: 56 MB/s
Endurance:
(up to)
1500 P/E Cycles
(3000 in SLC Mode)
Page Size: 16 KB
Block Size: 1152 Pages
Plane Size: 1980 Blocks

DRAM Cache

Type: Unknown
Capacity: 512 MB
(1x 512 MB)

Performance

Sequential Read: 3,400 MB/s
Sequential Write: 3,200 MB/s
Random Read: 650,000 IOPS
Random Write: 600,000 IOPS
Endurance: 200 TBW
Warranty: 5 Years
MTBF: 1.5 Million Hours
Drive Writes Per Day (DWPD): 0.2
SLC Write Cache: Yes

Features

TRIM: Yes
SMART: Yes
Power Loss Protection: No
Encryption:
  • Unknown
RGB Lighting: No
PS5 Compatible: No

Notes

Controller:

2 main cores using Cortex-R5 clocked at 667 MHz with CoXProcessor technology (one additional dual-core) Cortex-R5 clocked at a lower clock for better efficience. The difference between this revision and the E12 revision is that this has a nichel IHS to improve the temperature, a smaller size, smaller node (12nm TSMC FinFET) and this works with less DRAM capacity.

NAND Die:

Read latency tR: 58 µs (ABL)
Performance:
tPROG (typical) - 2100 µs (MSB)
tR (typical) - 59 µs
tPROG (ower page) ~ 200 µs
Estimated tPROG between 625 ~ 975 µs

Aug 28th, 2024 01:20 EDT change timezone

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