Capacity: | 480 GB |
---|---|
Variants: | 240 GB 480 GB |
Overprovisioning: | 65.0 GB / 14.5 % |
Production: | End-of-life |
Released: | 2019 |
Price at Launch: | 65 USD |
Part Number: | LNM600-480RBNA |
Market: | Consumer |
Form Factor: | M.2 2280 (Single-Sided) |
---|---|
Interface: | PCIe 3.0 x4 |
Protocol: | NVMe 1.3 |
Power Draw: |
0.15 W (Idle) 2.5 W (Avg) 3.8 W (Max) |
Manufacturer: | Silicon Motion |
---|---|
Name: | SM2263XT |
Architecture: | ARM 32-bit Cortex-R5 |
Core Count: | Dual-Core |
Frequency: | 575 MHz |
Foundry: | TSMC |
Process: | 28 nm |
Flash Channels: | 4 @ 800 MT/s |
Chip Enables: | 4 |
Controller Features: |
HMB
(enabled)
|
Manufacturer: | Micron |
---|---|
Name: | B16A FortisFlash |
Part Number: | NW926 |
Rebranded: | MT29F1T08EMCAGJ4-5M:A |
Type: | TLC |
Technology: | 64-layer |
Speed: | 50 MT/s .. 667 MT/s |
Capacity: | 4 chips @ 1 Tbit |
ONFI: | 4.0 |
Topology: | Floating Gate |
Process: | 20 nm |
Die Size: | 58 mm² (4.4 Gbit/mm²) |
Dies per Chip: | 4 dies @ 256 Gbit |
Planes per Die: | 2 |
Decks per Die: | 2 |
Word Lines: |
74 per NAND String
86.5% Vertical Efficiency |
Read Time (tR): | 76 µs |
Program Time (tProg): | 820 µs |
Block Erase Time (tBERS): | 15 ms |
Die Read Speed: | 842 MB/s |
Die Write Speed: | 39 MB/s |
Endurance: (up to) |
1500 P/E Cycles
(40000 in SLC Mode) |
Page Size: | 16 KB |
Block Size: | 2304 Pages |
Plane Size: | 504 Blocks |
Type: | None |
---|---|
Host-Memory-Buffer (HMB): | 64 MB |
Sequential Read: | 2,100 MB/s |
---|---|
Sequential Write: | 1,600 MB/s |
Random Read: | 188,000 IOPS |
Random Write: | 156,000 IOPS |
Endurance: | 240 TBW |
Warranty: | 3 Years |
MTBF: | 1.5 Million Hours |
Drive Writes Per Day (DWPD): | 0.5 |
SLC Write Cache: |
approx. 67 GB
(dynamic only) |
Speed when Cache Exhausted: | approx. 200 MB/s |
TRIM: | Yes |
---|---|
SMART: | Yes |
Power Loss Protection: | No |
Encryption: |
|
RGB Lighting: | No |
PS5 Compatible: | No |
Controller:The difference between this and the non-XT revision (SM2263, SM2263G, SM2263ENG, etc.) is that this revision doesn't support the DRAM cache, in fact it uses HMB (Host Memory Buffer). |