Thursday, January 25th 2024
CXMT Starts 18.5 nm DRAM Production at Initial Capacity of 100,000 Wafers per Month, YMTC Steps up R&D Amid Obstacles
In a bold move to circumvent US sanctions imposed on Chinese chipmakers, ChangXin Memory Technologies (CXMT) and Yangtze Memory Technologies (YMTC), leading Chinese suppliers of DRAM and NAND flash memory respectively, are pursuing distinct strategies to accelerate development despite US export restrictions. Sources at DigiTimes indicate that CXMT has commenced mass production of 18.5 nm process DRAM chips at its new plant in Hefei. By slightly exceeding the US limit of 18 nm, CXMT aims to increase capacity while technically complying with Commerce Department rules. The phase-one Hefei plant is nearly at full utilization, with monthly output reaching 100,000 wafers. The upcoming phase-two expansion, adding 40,000 monthly wafers by the end of 2024, could give CXMT 10% of total DRAM capacity at global scale. Moreover, CXMT plans to increase domestic sourcing for the new expansion significantly.
In contrast, YMTC's capacity growth faces constraints across the board after being added to the US Entity List. With imports of key equipment now halted, building up local supply chains for materials and tools has proven challenging. Despite R&D advances, including NAND flash with over 300 layers, YMTC has introduced new 120-layer products that intentionally fall under the US limit of 128. However, even these compliant chips await US approval for higher production. Looking ahead, while CXMT has carved a viable path around US restrictions, YMTC's capacity plans face ongoing obstacles. Still, through determined R&D efforts, including 232-layer and future 300+ layer NAND, YMTC aims to push China's semiconductor capabilities forward despite external headwinds.
Source:
DigiTimes
In contrast, YMTC's capacity growth faces constraints across the board after being added to the US Entity List. With imports of key equipment now halted, building up local supply chains for materials and tools has proven challenging. Despite R&D advances, including NAND flash with over 300 layers, YMTC has introduced new 120-layer products that intentionally fall under the US limit of 128. However, even these compliant chips await US approval for higher production. Looking ahead, while CXMT has carved a viable path around US restrictions, YMTC's capacity plans face ongoing obstacles. Still, through determined R&D efforts, including 232-layer and future 300+ layer NAND, YMTC aims to push China's semiconductor capabilities forward despite external headwinds.
3 Comments on CXMT Starts 18.5 nm DRAM Production at Initial Capacity of 100,000 Wafers per Month, YMTC Steps up R&D Amid Obstacles
At the same time they are a threat for the profitability of companies like Micron and Samsung in the DRAM and NAND market.
Even if they stay above 18nm and lower than 128 layers, they will eventually get blacklisted by the US, because these current low prices on DRAM and NAND are a problem for companies building DRAM and NAND chips outside China.
You do need to state clearly what that outcome is before moving to the next point. Even if the next point is a reiteration of the same.