Monday, October 25th 2021

AMD to Implement TSMC SoIC Tech With Upcoming HPC Chips

AMD will debut TSMC's ambitious System-on-Integrated-Chips (SoIC) technology with its upcoming HPC chips, according to a DigiTimes report. A step toward rivaling Intel's Foveros 3-D chip stacking technology, SoIC will enable AMD to stack logic, memory, and I/O as separate chips within a single package. The article references a next-generation "HPC" chip, although it didn't delve into what this could be. Logically, AMD would want to integrate its EPYC and MI accelerator lines into a single package that can be used in HPCs. Such a product would combine its Zen-series x86-64 serial processing, with CDNA-series scalar processing, expertise in memory, leveraging large on-die victim-caches, and high-bandwidth memory (HBM); along with next-gen I/O.
Source: DigiTimes
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3 Comments on AMD to Implement TSMC SoIC Tech With Upcoming HPC Chips

#1
Steevo
Shorter trace paths, more cache, but more heat concentration, but if they can move the cache and cores around it may spread the heat out.
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#2
sillyconjunkie
Great idea for low TDP mobile solutions. Is SoC on the bottom w memory on top or the other way around? ;)
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#3
prtskg
Hopefully there will be more information on November 8 when AMD discuss new EPYC and Instinct accelerators.
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