I believe this is the sixth delay ?
With 12 steppings before launch there must be some serious issues.

Such a long development time that random people around the world have had chips for nearly a year:

Ehmm, okay Intel. I guess I will keep my Cascade Lake X longer.

That pits SPR 60 cores against Zen 4 Epyc 96 cores as AMD has been releasing each Epyc series two years apart in March of that year.

March 2017 - Zen 1 Epyc
March 2019 - Zen 2 Epyc
March 2021 - Zen 3 Epyc
March 2023 - Zen 4 Epyc

SPR was originally designed to go up against 64 core Zen 3 and released in 2021. In anticipation of SPR with HBM3, AMD prepared Zen 3 Epyc with 3D V-cache.

AMD successfully released all those Zen 3 Epycs with no sign of any SPR processors. That left Intel only with 28 core Cooper Lake for 1, 2, 4 and 8 socket systems and Ice Lake for 1 and 2 sockets. None of these processors except in cases of AVX512 4 and 8 socket servers, can come close to Zen 3 Epyc.

If and when SPR does come out, it will not be competitive against Zen 4 with AVX512 and 3D V-cache; not to mention 128 cores in Zen 4c. It will be some time before SPRs successor is ready. Intel will not have a competitive enterprise solution for years.

Seems to be pattern starting here, pushing product launches to 2023

videocardz.com/newz/intel-sapphire-rapids-xeon-scalable-launch-window-reportedly-moves-to-february-6-march-3-2023

Intel interviewer: Is SPR delayed by 1.5 years due to a bug?

Pat: No

Intel interviewer: Is SPR delayed by 1.5 years due to 500 bugs?

Pat: Yes!

I believe the new CEO inherited all these issues that’s being swept under the rug. But there is no denying that Intel is on its decline, be it temporary or not. They’ve been slipping in product timeline for many years, and their investment in dGPU is obviously not paying off because of the same slippage. At this rate, they are just going to “bleed” sales. And honestly, I don’t think their investment in fabs is going to help them, if not become a burden to them.

Wow, an intel product launch delayed.......I'm sooooooooooo surprised....

Said absolutely N..O..B..O..D...Y :D

Perhaps intel should try the opposite strategy of announcing release dates that are 2-5 years out, then if they somehow manage to get something ready sooner, they can announce it as "ahead of schedule" and make themselves look like a group that actually has their sh*t together & pushed hard to bring new stuff to market as fast as possible....

watzupkenI believe the new CEO inherited all these issues that’s being swept under the rug. But there is no denying that Intel is on its decline, be it temporary or not. They’ve been slipping in product timeline for many years, and their investment in dGPU is obviously not paying off because of the same slippage. At this rate, they are just going to “bleed” sales. And honestly, I don’t think their investment in fabs is going to help them, if not become a burden to them.

That depends on if the global system stays intact. Intel is essentially betting on TSMC being Chinese owned in the next 3 years or so, and also that the relationships of semiconductors becoming increasingly strained.

If things cool down (hopefully) and go back to "normal" I would agree with you.

The main reason why Intel loss money last quarter. Server CPU are where the money is. It do not matter at all for AMD if they loose to RPL with Zen4. Zen 3 EPYC and Zen4 EPYC are just so profitable for AMD that they will just make huge margin and stay profitable until they are competitive again on desktop (if they need to wait).

AMD still have capacity issue but if the GPU market slow down, they could probably buy back from other company TSMC capacity to ship more EPYC.

If All Else Fails,

Intel can still pack eight Alder Lake dies on the substrate. There's just enough space, and if not, they can break off the igpu and e-cores part. And somehow make it work like "64" cores. Worth trying if you can't do it any other way. Then sell it as Xeron, hoping that not everybody will note the typo.

WirkoIf All Else Fails,

Intel can still pack eight Alder Lake dies on the substrate. There's just enough space, and if not, they can break off the igpu and e-cores part. And somehow make it work like "64" cores. Worth trying if you can't do it any other way. Then sell it as Xeron, hoping that not everybody will note the typo.

From what I can tell, it looks like Intel is having trouble shipping any product where parts of the CPU are on different tiles/chiplets. Maybe their interconnect is not playing nicely with their CPU architecture. If any of this is true, it could be a result of changing course from monolithic to tiles way too late in the game. From my vantage, Intel never intended to go this route and did so only in response to AMD figuring out that you can't make monolithic chips with higher performance on sub 10 nm die nodes.

DavenFrom what I can tell, it looks like Intel is having trouble shipping any product where parts of the CPU are on different tiles/chiplets. Maybe their interconnect is not playing nicely with their CPU architecture. If any of this is true, it could be a result of changing course from monolithic to tiles way too late in the game. From my vantage, Intel never intended to go this route and did so only in response to AMD figuring out that you can't make monolithic chips with higher performance on sub 10 nm die nodes.

The die itself isn't a big deal, but large die mean lower yields. Another factor that affect Intel Performance. They have huge issue to sell in the server market because their chips is many generation behind. And on the desktop Market, they need to rely on large chip that can mean lower yields, they also have different version of a chip to optimize the cost, but that mean more logistic. Disabling core on a large die isn't money efficient.

Their old management have put them in a bad location and they will need a lot of time to recover the years they lost. I am not sure if they hit the bottom last quarter.

DavenFrom what I can tell, it looks like Intel is having trouble shipping any product where parts of the CPU are on different tiles/chiplets. Maybe their interconnect is not playing nicely with their CPU architecture. If any of this is true, it could be a result of changing course from monolithic to tiles way too late in the game.

Yeah, that's likely. For Sapphire Rapids, Intel said that the mesh networks of the four tiles would connect to each other, forming a large mesh network, and it would be done with no or little interface logic, which would add latency. I suspect that's just one of the things which are easier said than done when your goal is a 4 cm by 4 cm megachip running at ~4 GHz.

DavenFrom my vantage, Intel never intended to go this route and did so only in response to AMD figuring out that you can't make monolithic chips with higher performance on sub 10 nm die nodes.

That's hard to believe. Would just be too dumb if it was true. Yes, it's possible that they were far too optimistic about yields. But they must have understood long ago that they would hit the reticle size limit, which is 33 x 26 mm, in a reasonable and predictable time frame. They must have understood that chiplets mean flexibility, you can fit a variable number of equal chiplets on a substrate to build many different models of CPU. They must have understood that manufacturing is expensive, even if the yield is 100% and you own the fabs yourself. Cost per transistor is projected to only go up after 7 nm. Also, Intel had the Kaby Lake-G, a working prototype with chiplets and EMIB, in Q1 2018.

It will launch alongside the gpu's :D

PunkenjoyThe main reason why Intel loss money last quarter. Server CPU are where the money is. It do not matter at all for AMD if they loose to RPL with Zen4. Zen 3 EPYC and Zen4 EPYC are just so profitable for AMD that they will just make huge margin and stay profitable until they are competitive again on desktop (if they need to wait).

ADL and RPL aren't feasible architectures for server CPU anyway.
Nobody wants Hybrid CPUs in server which is a nightmare for VM applications.

Oh the irony...
www.techpowerup.com/235092/intel-says-amd-epyc-processors-glued-together-in-official-slide-deck
Seems the glue is weak on Intel side. :D

JAKraSeems the glue is weak on Intel side. :D

They're using this, seems good, it says "electrical" among other things.

That's bad news for intel - As now it competes with AMD EPYC 9000 series based on Genoa silicon with Zen4 cores - which have 96 cores - damn that's scary to compare itself. Team red is moving ahead in the game.

Cores/Threads	TDP
AMD EPYC Genoa “9000” Series
EPYC 9174F	16/32	320W
EPYC 9124	16/32	200W
EPYC 9000 (ES)	96/192	320-400W