Tuesday, September 26th 2023
GlobalFoundries Submits Applications for U.S. CHIPS and Science Act Funding
GlobalFoundries (GF) announced today it has applied for U.S. CHIPS and Science Act Funding, with two full applications submitted to the CHIPS Program Office of the U.S. Department of Commerce. The submitted applications are for capacity expansion and modernization of GF's U.S. manufacturing facilities.
"As the leading manufacturer of essential semiconductors for the U.S. government, and a vital supplier to the automotive, aerospace and defense, IoT and other markets, GF has submitted our applications to the CHIPS Program Office to participate in the federal grants and investment tax credits enabled by the U.S. CHIPS and Science Act," said Steven Grasso, senior director of global government affairs at GF. "This federal support is critical for GF to continue growing its U.S. manufacturing footprint, strengthening U.S economic security, supply chain resiliency, and national defense."
GF is a longstanding partner to the U.S. government and the leading supplier of securely manufactured essential chips for the U.S. aerospace and defense industry. GF-made essential chips are driving innovation, increasing power efficiency, and minimizing the total cost of ownership for products in high-growth markets including automotive, data center, IoT, aerospace and defense, and smart mobile.
Source:
GlobalFoundries
"As the leading manufacturer of essential semiconductors for the U.S. government, and a vital supplier to the automotive, aerospace and defense, IoT and other markets, GF has submitted our applications to the CHIPS Program Office to participate in the federal grants and investment tax credits enabled by the U.S. CHIPS and Science Act," said Steven Grasso, senior director of global government affairs at GF. "This federal support is critical for GF to continue growing its U.S. manufacturing footprint, strengthening U.S economic security, supply chain resiliency, and national defense."
5 Comments on GlobalFoundries Submits Applications for U.S. CHIPS and Science Act Funding
Anyways, wasn't there an announcement a few days ago about GloFlo getting some massive gov't contract ?
Apparently that wasn't enough for them, so now they're dippin in da cookie jar again :D
- 12nm LP+
"Derived from GF’s existing 12nm Leading Performance (12LP) platform, GF’s new 12LP+ provides either a 20% increase in performance or a 40% reduction in power requirements over the base 12LP platform, plus a 15% improvement in logic area scaling."
I won't forget the fact that they were about to enter the game with a 7nm process similar to TSMC, at a time when intel was still burning money to mass produce 10nm chips. For reasons of capital, they or the investor who controls the company decided to abort the plans...
However, it doesn't appear on the roadmap:
12FDX so far is the only node that will appear to launch post-pivot away from FinFETs. This however has a roadmap in Europe/France: "CEA-Leti, Globalfoundries, Soitec and STMicroelectronics have partnered up to move FD-SOI to lower nodes."
www.cea.fr/english/Pages/News/nextgen-inventing-future-generations-electronic-chips.aspx
www.eenewseurope.com/en/leti-details-move-to-10nm-fd-soi-process-in-europe/
"French research centre CEA-Leti is setting up a cleanroom to develop modules for a 10nm low power process technology using fully depleted silicon on insulator (FD-SOI) that will move to 7nm in the future."
Capacity and Modernization indicated in PR seems to gel with Fab 8.2 being 22FDX/12FDX first then 10nm/7nm FDSOI-derived later. Fab 8.1 would most likely focus on US-developed FDSOI for 300mm:
www.skywatertechnology.com/globalfoundries-and-skywater-technology-sign-mou-for-technology-development-to-strengthen-domestic-supply-assurance-for-u-s-government/
"Additionally, as a part of the MOU, GF and SkyWater will align technology roadmaps and leverage unique and complementary capabilities for development and high-volume production path to market for advanced computing, artificial intelligence and related technologies." Dual-Fab => 200mm Skywater Low-volume, 300mm GloFo High-volume.
www.ll.mit.edu/research-and-development/advanced-technology/microsystems-prototyping-foundry/fully-depleted
"(045SOI) 45-nm node variant is under development"
opensource.googleblog.com/2022/07/SkyWater-and-Google-expand-open-source-program-to-new-90nm-technology.html
"SkyWater’s commercial 90nm fully depleted silicon on insulator (FDSOI) CMOS process technology. SKY90-FD is based on MIT Lincoln Laboratory’s 90 nm commercial FDSOI technology, and enables designers to create complex integrated circuits for a diverse range of applications."
github.com/google/sky90fd-pdk
Back to 12FDX, full rumors:
Old 12FDX => 20nm Unstrained Si NFET, 20nm Strained SiGe PFET // ~1.27x 22FDX, which was ~1.1x faster than 14LPP.
New 12FDX => ~14nm L-sSOI NFET, ~14nm Strained SiGe PFET, reason for this is this quote "The 12FDX program is alive and well. It has a lot in common with our 12nm FinFET process so we are about 60 percent done. We are optimizing the process." from 2020. This is different from 2018 12FDX which was ~90% done with the 20nm Gates. Basically, looking at these:
GF12LP Super Low Vt 14nm Gate Length High Density (7.5T) Standard Cell Base Logic Library 84nm Pitch
GF12LP Low Vt 14nm Gate Length High Density (7.5T) Standard Cell Base Logic Library 84nm Pitch
GF12LP Regular Vt 14nm Gate Length High Density (7.5T) Standard Cell Base Logic Library 84nm Pitch
FDSOI generally with the new NFET generally implies a big speed-boost:
40nm Bobcat ~1.6 GHz to 1.75 GHz @ 4.9mm^2 moving to a similar layout but RISC-V ISA. Then, running at maximum Frequency macros should have a similar core at ~16 GHz to ~17.5 GHz at ~6 mm^2 on 12FDX.
The above is the general strategy for FDSOI in High-Performance. FinFET => High-density Multi-core && FDSOI => High-density Frequency.
RK3588 replacement with FDSOI/RISC-V strategy:
1x P670 core @ (less than) 4.7 GHz can replace multi-core performance of 4x A76 @ 2.4/2.2 GHz
1x P470 core @ (less than) 3.5 GHz can replace multi-core performance of 4x A55 @ 1.8 GHz
RPi4 replacement with the same strategy:
2x P470 @ 3.5 GHz on 12FDX can replace multi-core performance of 4x A72 @ 1.5/1.8 GHz
Replace the Broadcom iGPU IP with ThinkSilicon's NEOX G+A IP @ 1.2 GHz on 12FDX.
GloFo should be able to grab most of the essential market with 12FDX.