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Intel Mobile Pentium III 600 LV

1
Cores
1
Threads
9 W
TDP
600 MHz
Frequency
N/A
Boost
Coppermine
Codename
Micro-BGA2
Socket
Front
Front
Intel Micro-BGA2
Intel Micro-BGA2
The Intel Mobile Pentium III 600 LV was a mobile processor with 1 core, launched in June 2000, at an MSRP of $316. It is part of the Pentium III lineup, using the Coppermine architecture with Micro-BGA2. Mobile Pentium III 600 LV has 256 KB of L2 cache and operates at 600 MHz. Intel is building the Mobile Pentium III 600 LV on a 180 nm production process using 28 million transistors. The multiplier is locked on Mobile Pentium III 600 LV, which limits its overclocking capabilities.
With a TDP of 9 W, the Mobile Pentium III 600 LV consumes extremely little energy. The highest officially supported memory speed is 133 MT/s, but with overclocking (and the right memory modules) you can go even higher. Actual memory technology support depends on the chosen motherboard, because the memory controller is located on the motherboard (not in the processor). For communication with other components in the machine, Mobile Pentium III 600 LV uses a PCI-Express N/A connection.
Many games will refuse to start on this processor due to the lack of the SSE2/SSE3/SSE4 instruction set.

Physical

Socket: Intel Micro-BGA2
Foundry: Intel
Process Size: 180 nm
Transistors: 28 million
Die Size: 106 mm²
Package: H-PBGA495
tJMax: 100°C

Processor

Market: Mobile
Production Status: End-of-life
Release Date: Jun 19th, 2000
Launch Price: $316
Part#: SL4GH
SL4JM

Performance

Frequency: 600 MHz
Low Frequency Mode:500 MHz
Turbo Clock: N/A
Base Clock: 100 MHz
Multiplier: 6.0x
Multiplier Unlocked: No
Voltage: 1.35 V
LFM Voltage:1.1 v
TDP: 9 W
Max Power:16 W

Architecture

Codename: Coppermine
Generation: Pentium III
(Coppermine)
Memory Support: unknown
Depends on motherboard
Rated Speed: 133 MT/s
Memory Bus: Single-channel
Northbridge Location: Motherboard
ECC Memory: No
PCI-Express: N/A

Core Config

# of Cores: 1
# of Threads: 1
SMP # CPUs: 1
Integrated Graphics: On certain motherboards (Chipset feature)

Cache

Cache L1: 32 KB
Cache L2: 256 KB

Features

  • MMX
  • SSE
  • SpeedStep

Notes

SL4GH - Stepping B0
SL4JM - Stepping C0
Jul 16th, 2024 01:30 EDT change timezone

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