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Matrox Parhelia-512
PHW-C1
PHF-D2
PHW-C1 No-IHS
PHF-D2 No-IHS
Block Diagram
Matrox's Parhelia-512 GPU uses the Parhelia architecture and is made using a 150 nm production process at UMC. With a die size of 174 mm² and a transistor count of 80 million it is a small chip. Parhelia-512 supports DirectX 8.1. For GPU compute applications, OpenCL version N/A can be used. It features 4 pixel shaders and 4 vertex shaders, 16 texture mapping units and 4 ROPs. Due to the lack of unified shaders you will not be able to run recent games at all (which require unified shader/DX10+ support).
Graphics Processor
Released
Jun 25th, 2002
GPU Name
Parhelia-512
Architecture
Parhelia
Foundry
UMC
Process Size
150 nm
Transistors
80 million
Density
459.8K / mm²
Die Size
174 mm²
Graphics Features
DirectX
8.1
OpenGL
1.3
OpenCL
N/A
Vulkan
N/A
Pixel Shader
1.3
Vertex Shader
2.0
Render Config
Pixel Shaders
4
Vertex Shaders
4
TMUs
16
ROPs
4
Matrox GPU Architecture History
Graphics cards using the Matrox Parhelia-512 GPU
Name
Chip
Memory
Shaders
TMUs
ROPs
GPU Clock
Memory Clock
256 MB
4 / 4
16
4
200 MHz
250 MHz
PHW-C1
128 MB
4 / 4
16
4
220 MHz
275 MHz
PHW-C1
128 MB
4 / 4
16
4
200 MHz
250 MHz
PHW-C1
256 MB
4 / 4
16
4
200 MHz
250 MHz
128 MB
2 / 2
8
2
250 MHz
250 MHz
PHF-D2
128 MB
4 / 4
16
4
250 MHz
300 MHz
PHF-D2
256 MB
4 / 4
16
4
250 MHz
325 MHz
256 MB
4 / 4
16
4
200 MHz
250 MHz
256 MB
4 / 4
16
4
200 MHz
250 MHz
256 MB
4 / 4
16
4
200 MHz
250 MHz
256 MB
4 / 4
16
4
200 MHz
250 MHz
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