JEDEC Announces Enhanced NAND Flash Interface Standard With Increased Speeds and Efficiency
JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of JESD230G: NAND Flash Interface Interoperability Standard. JESD230G introduces speeds of up to 4800 MT/s, as compared to 400 MT/s in the first version of JESD230 published in 2011. Also, JESD230G adds a separate Command/Address Bus Protocol (SCA), delivering enhanced throughput and efficiency by allowing hosts and NAND devices to take maximum advantage of the latest interface speeds. JESD230G is available for free download from the JEDEC website.
"JEDEC is excited to release JESD230G," said David Landsman, Distinguished Engineer at Western Digital and Chair of the JEDEC NAND TG. He added, "This version of JESD230 further advances the capabilities of NAND flash devices to meet the growing demands of their expanding range of applications and continues the JEDEC tradition of building interoperable ecosystems through open industry standards."
"JEDEC is excited to release JESD230G," said David Landsman, Distinguished Engineer at Western Digital and Chair of the JEDEC NAND TG. He added, "This version of JESD230 further advances the capabilities of NAND flash devices to meet the growing demands of their expanding range of applications and continues the JEDEC tradition of building interoperable ecosystems through open industry standards."