Credo Technology Group Holding Ltd (Credo), an innovator in providing secure, high-speed connectivity solutions that deliver improved energy efficiency as data rates and corresponding bandwidth requirements increase throughout the data infrastructure market, is excited to announce the company's first Toucan PCI Express (PCIe) 6, Compute Express Link (CXL) 3.x and Magpie PCIe 7, CXL 4.x retimers and OSFP-XD 16x 64GT/s (1 Tb) PCIe 6/CXL HiWire AECs. Credo will demonstrate the Toucan PCIe 6 retimers and HiWire AECs at the upcoming Open Compute Project (OCP) Summit October 15-17 in Booth 31 and the OCP Innovation Center.

Building on Credo's renowned Serializer/Deserializer (SerDes) technology, the new PCIe 6 and PCIe 7 retimers deliver industry-leading performance and power efficiency while being built on lower cost, more mature process nodes than competing devices. Credo will also include enhanced diagnostic tools, including an embedded logic analyzer and advanced SerDes tools driven by a new GUI designed to enable rapid bring up and debug of customer systems.

Phison, a global leader in NAND controllers and storage solutions, is set to showcase its cutting-edge technologies at the Future of Memory and Storage (FMS) 2024. The event will highlight the new Pascari D-Series D200V, a datacenter SSD with up to 61.44 TB alongside the latest capabilities of aiDAPTIV+ Pro Suite, the company's end-to-end on-premises generative AI solution. Each solution is purpose-built to meet the demands of modern, data-intensive workloads, from small to medium-sized businesses looking to leverage GenAI through aiDAPTIV+, to enterprises scaling quickly with Pascari Data Center storage. These solutions allow users the necessary storage, scalability and processing power for data-hungry AI workloads.

The Pascari D200V is the latest addition to Phison's renowned D-Series product family. This SSD is designed for data centers and comes in the most popular form factors. "Pascari's new D200V scales to 61.44 TB today with Kioxia BiCS FLASH generation 8 QLC flash memory," says K.S. Pua, CEO of Phison Electronics. "The D-Series also allows room to scale beyond 100 TB, providing data centers with the large capacity options needed to reduce operating costs."

Renesas Electronics Corporation, a premier supplier of advanced semiconductor solutions, today introduced the first clock buffers and multiplexers that meet stringent PCIe Gen6 specifications. Renesas, the industry's undisputed leader in timing solutions, is offering 11 new clock buffers and 4 new multiplexers. The new devices, which also support and provide extra margin for PCIe Gen5 implementations, complement Renesas' low-jitter 9SQ440, 9FGV1002 and 9FGV1006 clock generators to offer customers a complete PCIe Gen6 timing solution for data center/cloud computing, networking and high-speed industrial applications. The PCIe Gen6 standard supports extremely high data rates of 64 GT/s while requiring very low clock jitter performance of less than 100fs RMS. Renesas' new RC190xx clock buffers and RC192xx multiplexers have PCIe Gen6 additive jitter specs of only 4fs RMS, making them virtually noiseless, and thereby future-proofing customer designs for the next generation of industry standards.

"PCIe Gen6 timing will be at the heart of new equipment in data centers, high-speed networking and other applications," said Zaher Baidas, Vice President of the Timing Products Division at Renesas. "As we have done for preceding generations, Renesas is providing customers with the first timing solution to enable these new, higher-performance systems. Our customers know that we have the technical expertise and market knowledge to ensure that their products will be able to meet future requirements as well." "By delivering the first discrete timing solution for PCIe Gen6, Renesas is enabling customers to develop the next-generation of high-performance systems," said Rich Wawrzyniak, Principal Analyst for Semico Research. "It will be interesting to see the innovative implementations that result from this new capability, especially when considering how solutions for the emerging Chiplet market are starting to evolve, with the need for increasing speed and bandwidth as an underlying constant."

PCI-SIG, the organization responsible for the widely adopted PCI Express (PCIe ) standard, today announced the official release of the PCIe 6.0 specification, reaching 64 GT/s. PCI Express technology has served as the de facto interconnect of choice for nearly two decades. The PCIe 6.0 specification doubles the bandwidth and power efficiency of the PCIe 5.0 specification (32 GT/s), while providing low latency and reduced bandwidth overhead.

"PCI-SIG is pleased to announce the release of the PCIe 6.0 specification less than three years after the PCIe 5.0 specification," said Al Yanes, PCI-SIG Chairperson and President. "PCIe 6.0 technology is the cost-effective and scalable interconnect solution that will continue to impact data-intensive markets like data center, artificial intelligence/machine learning, HPC, automotive, IoT, and military/aerospace, while also protecting industry investments by maintaining backwards compatibility with all previous generations of PCIe technology."