Texas Instruments (TI) today broke ground on its new 300-mm semiconductor wafer fabrication plant (or "fab") in Lehi, Utah. Joined by Utah Governor Spencer Cox, state and local elected officials, as well as community leaders, TI President and Chief Executive Officer Haviv Ilan celebrated the first steps toward construction of the new fab, LFAB2, which will connect to the company's existing 300-mm wafer fab in Lehi. Once completed, TI's two Utah fabs will manufacture tens of millions of analog and embedded processing chips every day at full production.

"Today we take an important step in our company's journey to expand our manufacturing footprint in Utah. This new fab is part of our long-term, 300-mm manufacturing roadmap to build the capacity our customers will need for decades to come," said Ilan. "At TI, our passion is to create a better world by making electronics more affordable through semiconductors. We are proud to be a growing member of the Utah community, and to manufacture analog and embedded processing semiconductors that are vital for nearly every type of electronic system today."

In an extraordinary leap forward for the chiplet industry, the groundbreaking collaboration between the Open Compute Project Foundation (OCP) and JEDEC is set to usher in a new era of innovation. By merging the capabilities and open standards of OCP's Chiplet Data Extensible Markup Language (CDXML) and JEDEC's JEP30 PartModel Guidelines, this partnership, initiated in late 2022, promises to revolutionize chiplet design, manufacturing and integration. The result will be a unified structure that supports both chiplets and general electronic parts within the overarching purview of JEDEC.

In a significant development, the integration of OCP CDXML into JEP30 has reached a critical milestone, enabling chiplet builders to provide standardized chiplet part descriptions to their customers electronically. This advancement opens the door to automating System in Package (SiP) design and assembly using chiplets. The chiplet descriptions encompass crucial information for SiP builders, including thermal properties, physical and mechanical requirements, behavior specifications, power and signal integrity properties, testing in-package and security parameters.

TSMC's Japanese facilities are set to fabricate "mature-technology chips" (28 nm and 22 nm) once construction at the site concludes next year—this $8.6 billion fab on Kyushu Island is proving to be a promising prospect for company leadership back in Taiwan. A Reuters report suggests that more ambitious plans are afoot for Japan as a key production base—two anonymous insiders claim that problems encountered at the Arizona plant have caused a shift in focus onto other global TSMC sites.

There is potential for further expansion and upgrades in Kikuyo, Kumamoto Prefecture—TSMC has reportedly taken an "increasingly optimistic view" of Japan's work culture, relatively cheap-to-build facility and a co-operative government. A smooth ramp-up of the first fabrication facility is the primary goal in 2024, but adjusted plans could add more capacity. The insiders think that a second site is also a possibility, with consideration for more advanced chip making.

Intel Corporation today announced that it has agreed to sell an approximately 10% stake in the IMS Nanofabrication business ("IMS") to TSMC. TSMC's investment values IMS at approximately $4.3 billion, consistent with the valuation of the recent stake sale to Bain Capital Special Situations ("Bain Capital"). Intel will retain majority ownership of IMS, which will continue to operate as a standalone subsidiary under the leadership of CEO Dr. Elmar Platzgummer. The transaction is expected to close in the fourth quarter of 2023.

IMS is the established industry leader in multi-beam mask writing tools required to develop advanced extreme ultraviolet lithography (EUV), which is broadly adopted in leading-edge technology nodes that enable the most demanding computing applications, such as artificial intelligence (AI) and mobile. Together, Bain Capital and TSMC's investments provide IMS with increased independence and reinforce confidence in the significant opportunity ahead of IMS. This added autonomy will help IMS accelerate its growth and drive the next phase of lithography technology innovation to enable the industry's transition into new patterning systems, such as high-numerical-aperture (high-NA) EUV.

Make health and fitness journeys smoother with the Exynos W930—the wearable processor that keeps smartwatches ahead of the curve, with new leaps in performance and power saving.

Watch it work wonders
Exynos W930 is equipped with the Arm Cortex-A55 dual-core CPU, boosting CPU speed to 1.4 GHz for an 18% jump over our last generation processor. In-package DRAM expands to 2 GB in the Exynos W930, passing the last generation by 33%, so you can switch between apps up to 25% faster and manage your workouts and your work life better with a suite of apps performing at their best.

Intel and the German federal government have signed a revised letter of intent for Intel's planned leading-edge wafer fabrication site in Magdeburg, the capital of Saxony-Anhalt state in Germany. The agreement encompasses Intel's expanded investment in the site, now expected to be more than 30 billion euros for two first-of-a-kind semiconductor facilities (also known as "fabs") in Europe, along with increased government support that includes incentives, reflecting the expanded scope and change in economic conditions since the site was first announced.

Intel acquired the land for the project in November 2022, and the first facility is expected to enter production in four to five years following the European Commission's approval of the incentive package. Given the current timeline and scale of the investment, Intel plans to deploy more advanced Angstrom-era technology in the facilities than originally envisioned. The Magdeburg site will serve Intel products and Intel Foundry Services customers.

Today, Intel announced the release of its newest quantum research chip, Tunnel Falls, a 12-qubit silicon chip, and it is making the chip available to the quantum research community. In addition, Intel is collaborating with the Laboratory for Physical Sciences (LPS) at the University of Maryland, College Park's Qubit Collaboratory (LQC), a national-level Quantum Information Sciences (QIS) Research Center, to advance quantum computing research.

"Tunnel Falls is Intel's most advanced silicon spin qubit chip to date and draws upon the company's decades of transistor design and manufacturing expertise. The release of the new chip is the next step in Intel's long-term strategy to build a full-stack commercial quantum computing system. While there are still fundamental questions and challenges that must be solved along the path to a fault-tolerant quantum computer, the academic community can now explore this technology and accelerate research development."—Jim Clarke, director of Quantum Hardware, Intel

Global semiconductor materials market revenue grew 8.9% to $72.7 billion in 2022, surpassing the previous market high of $66.8 billion set in 2021, SEMI, the global industry association representing the electronics manufacturing and design supply chain, reported today in its Materials Market Data Subscription (MMDS). Wafer fabrication materials and packaging materials revenue in 2022 reached $44.7 billion and $28.0 billion, respectively, increasing 10.5% and 6.3%. The silicon, electronic gases, and photomask segments showed the strongest growth in the wafer fabrication materials market, while the organic substrates segment largely drove packaging materials market growth.

For the 13th consecutive year, Taiwan, at $20.1 billion, was the world's largest consumer of semiconductor materials on the strength of its foundry capacity and advanced packaging base. China continued to register strong year-over-year results, ranking second in 2022, while Korea finished as the third largest consumer of semiconductor materials. Most regions registered high single- or double-digit growth last year.

AMD is reported to be forming plans for its Instinct MI400 Accelerator series, according to a leaked internal email. This information was shared by a hardware tipster (HXL/@9550Pro) on Twitter, but their post has been deleted as some point today. Wccftech was quick enough to note down the details, and their report suggests that AMD is already making plans for an APU range that is set to succeed the unreleased Instinct MI300 lineup (expected later in 2023). Instinct MI400 accelerators are touted to drive next generation data center and cloud platforms.

The leaked email email contained information about three upcoming products: Weisshorn, MI450 and XSwitch. Kepler's recent tweet posits that Weisshorn is AMD's in-house moniker for Zen 6 "Morpheus" architecture-based Venice CPUs - these are alleged to form part of an upcoming EPYC lineup (slated for 2025 or 2026). Hardware experts reckon that AMD will introduce a new interconnect fabric with the MI400 series - "XSwitch" is speculated to be the company's main technological answer to NVIDIA's NVLINK.

It appears it's not only AMD that is eyeing a move to Samsung, when it comes to fabricating upcoming chips, as reports are now suggesting that Qualcomm is considering a second attempt at making flagship mobile SoCs at Samsung's foundry. However, in this case, we're talking 3 nm chips in the shape of the Snapdragon 8 Gen 4, which is expected to launch in devices sometime in 2024. This is said to be Qualcomm's first chip based on cores built by Nuvia, a company that Qualcomm acquired in 2021.

That said, Qualcomm will apparently not rely on Samsung alone, but will also be making the Snapdragon 8 Gen 4 at TSMC. This might be because of past experience with Samsung, but the report out of Taiwan, suggests that the chips made by Samsung's foundry business will be used in Samsung branded phones, whereas the TSMC made chips might end up in devices by Qualcomm's other customers. It could also be a bet for Qualcomm to try and get better pricing by both foundries or a means of hedging their bets, to see which foundry produces the better chips. Then there's the situation between the PRC and the ROC, which could potentially put Qualcomm in a situation where it has no chips, so going with Samsung could be a means of covering for all potential risk scenarios.

MIT researchers have developed a groundbreaking technology that allows for the growth of 2D transition metal dichalcogenide (TMD) materials directly on fully fabricated silicon chips, enabling denser integrations. Conventional methods require temperatures of about 600°C, which can damage silicon transistors and circuits as they break down above 400°C. The MIT team overcame this challenge by creating a low-temperature growth process that preserves the chip's integrity, allowing 2D semiconductor transistors to be directly integrated on top of standard silicon circuits. The new approach grows a smooth, highly uniform layer across an entire 8-inch wafer, unlike previous methods that involved growing 2D materials elsewhere before transferring them to a chip or wafer. This process often led to imperfections that negatively impacted device and chip performance.

Additionally, the novel technology can grow a uniform layer of TMD material in less than an hour over 8-inch wafers, a significant improvement from previous methods that required over a day for a single layer. The enhanced speed and uniformity of this technology make it suitable for commercial applications, where 8-inch or larger wafers are essential. The researchers focused on molybdenum disulfide, a flexible, transparent 2D material with powerful electronic and photonic properties ideal for semiconductor transistors. They designed a new furnace for the metal-organic chemical vapor deposition process, which has separate low and high-temperature regions. The silicon wafer is placed in the low-temperature region while vaporized molybdenum and sulfur precursors flow into the furnace. Molybdenum remains in the low-temperature region, while the sulfur precursor decomposes in the high-temperature region before flowing back into the low-temperature region to grow molybdenum disulfide on the wafer surface.

Early details of MediaTek's next generation mobile chipset have emerged this week, courtesy of renowned leaker Digital Chat Station via their blog on Weibo. The successor to MediaTek's current flagship Dimensity 9200 mobile chipset will likely be called "Dimensity 9300" - a very imaginative bump up in numbering - with smartphone brand Vivo involved as a collaborator. The tipster thinks that the fabless semiconductor company has contracted with TSMC for fabrication of the Dimensity 9300 chipset - and the foundry's N4P process has been selected by MediaTek, which could provide a bump in generational performance when compared to the older 4 nm and 5 nm standards used for past Dimensity SoC ranges. It should be noted that the current generation Dimensity 9200 chipset is presently manufactured via TSMC's N4P process.

MediaTek is seeking to turnaround its fortunes in the area of flagship mobile chipsets - industry watchdogs have cited a limited uptake of the Taiwanese company's Dimensity 9200 SoC as a motivating factor in the creation of a very powerful successor. Digital Chat Station suggests that the upcoming 9300 model will pack enough of a hardware punch to rival Qualcomm's forthcoming Snapdragon 8 Gen 3 SoC - both chipsets are touted to release within the same time period of late 2023. According to previous speculation, Qualcomm has also contracted with TSMC's factory to pump out the Snapdragon 8 Gen 3 via the N4P (4 nm) process.

Intel Foundry Services (IFS) and Arm today announced a multigeneration agreement to enable chip designers to build low-power compute system-on-chips (SoCs) on the Intel 18A process. The collaboration will focus on mobile SoC designs first, but allow for potential design expansion into automotive, Internet of Things (IoT), data center, aerospace and government applications. Arm customers designing their next-generation mobile SoCs will benefit from leading-edge Intel 18A process technology, which delivers new breakthrough transistor technologies for improved power and performance, and from IFS's robust manufacturing footprint that includes U.S.- and EU-based capacity.

"There is growing demand for computing power driven by the digitization of everything, but until now fabless customers have had limited options for designing around the most advanced mobile technology," said Pat Gelsinger, CEO of Intel Corporation. "Intel's collaboration with Arm will expand the market opportunity for IFS and open up new options and approaches for any fabless company that wants to access best-in-class CPU IP and the power of an open system foundry with leading-edge process technology."

Samsung Electronics has announced that its sub-division, Samsung Display, is planning to invest $3.1 billion until 2026 in Asan, South Korea to manufacture advanced organic light-emitting diode (OLED) display panels. The country's ministry stated that Samsung's next generation of OLED display panels will be integrated into tablets and laptops. There are already rumors swirling that Apple has contracted with Samsung Display to produce parts for a refresh of the MacBook Pro range that is set to debut at some point before 2026.

Industry insiders are claiming that the substantial investment into the company's Asan, South Chungcheong factory will help fulfil orders placed by Apple for iPad and MacBook OLED displays - the North American company has not officially confirmed an adoption of that type of screen technology for these product ranges. Samsung is likely trying to secure a long term relationship with the Silicon Valley behemoth, and at the same time outmaneuver its competitors in South Korea as well as those in neighboring nations. It has been reported that domestic rival LG is currently unable to take on new orders, as its display factories are functioning at maximum production capacities.

Samsung Electronics has announced ambitious long term plans to expand its operation in South Korea. The company is set to invest around $230 billion in new fabrication facilities, with five locations marked for development in Yongin, a city located within the Seoul Capital Area. The five new factories with mixed foundry and memory manufacturing purposes, will form part of the South Korean government's intentions to assemble a mega semiconductor hub in the region.

South Korea's Ministry of Trade, Industry and Energy (MOTIE) on Wednesday revealed its intent to invest $422 billion by 2026 to boost production of six core technologies: semiconductors, electric vehicle batteries, autonomous vehicles, robots and displays. The government provided a breakdown of the total budget, and $260 billion has been allocated for the country's chip space to develop system semiconductors into the year 2026.

The Biden-Harris Administration through the U.S. Department of Commerce's National Institute of Standards and Technology today launched the first CHIPS for America funding opportunity for manufacturing incentives to restore U.S. leadership in semiconductor manufacturing, support good-paying jobs across the semiconductor supply chain, and advance U.S. economic and national security.

As part of the bipartisan CHIPS and Science Act, the Department of Commerce is overseeing $50 billion to revitalize the U.S. semiconductor industry, including $39 billion in semiconductor incentives. The first funding opportunity seeks applications for projects to construct, expand, or modernize commercial facilities for the production of leading-edge, current-generation, and mature-node semiconductors. This includes both front-end wafer fabrication and back-end packaging. The Department will also be releasing a funding opportunity for semiconductor materials and equipment facilities in the late spring, and one for research and development facilities in the fall.

Huawei, the Chinese technology giant, has reportedly filed patents that it is developing extreme ultraviolet (EUV) scanners for use in the manufacturing process of semiconductors. This news comes amid increasing tensions between Huawei and the US government, which has imposed a series of sanctions on the company in recent years. According to UDN, Huawei has filed a patent that covers the entire EUV scanner with a 13.5 nm EUV light source, mirrors, lithography for printing circuits, and proper system control. While filing a patent is not the same as creating an accurate EUV scanner, it could enable China to produce a class of chips below 7 nm and have a homegrown semiconductor production, despite the ever-increasing US sanctions.

The development of EUV scanners is a significant milestone for Huawei and the semiconductor industry. However, the company's progress in this area may be hindered by the US government's sanctions, which have limited Huawei's access to certain technologies and markets. It is important to note that Chinese SMIC wanted to develop EUV fabrication based on third-party EUV tools; however, those plans were scrapped as the Wassenaar agreement came into action and prohibited the sales of advanced tools to Chinese companies. Huawei's development could represent a new milestone for the entire Chinese industry.

Seoul Viosys ("SVC"), a manufacturer of optical semiconductor devices, will present micro-LED based on the laminated structure - which enables high-resolution display - as well as its micro-LED display products at the IFA (Internationale Funkausstellung Berlin) 2022. The stacked micro-LED developed by Seoul Viosys has a unique and innovative structure in which three chips representing red, green, and blue (R/G/B) are vertically arrayed instead of the usual horizontal array. Its main difference from conventional micro-LEDs is that its R/G/B LED in the stacked structure emit colors as if they constitute a single pixel through perfect color mixing.

Micro-LED produced by Seoul Viosys can achieve deep black color and clear image thanks to the stacked structure. Also, as colors combining R/G/B are emitted externally from inside a pixel, viewers can enjoy clear pictures without distortions from any direction.

Kioxia Corporation, the world leader in memory solutions, today held a groundbreaking ceremony for its state-of-the-art semiconductor fabrication facility (Fab2) at its Kitakami Plant in Iwate Prefecture, Japan. Utilizing AI-based cutting-edge manufacturing, the new facility will contribute towards possible expansion of production of its proprietary 3D flash memory BiCS FLASH at the Kitakami Plant. Construction of the Fab2 facility is scheduled to be completed in 2023. The Fab2 facility will have an earthquake-absorbing structure and environmentally friendly design that utilizes advanced energy saving manufacturing equipment and renewable energy sources. In addition, an administration building will be constructed to accommodate the control management and technical departments in response to the increased staff.

"As a leader in memory, this Fab2 facility will become Kioxia's key manufacturing hub to produce our memory products at scale. We are planning to introduce automated in-facility transfers and advanced production control to make Fab2 a truly world-class smart fabrication facility," said Nobuo Hayasaka, President and CEO, Kioxia. "Fab2 will be able to intelligently coordinate and optimize its production with Fab1 at Kitakami Plant as well as our fabs in the Yokkaichi Plant, enabling the company to seize opportunities in the growing memory market in a timely manner." Under its mission of uplifting the world with memory, Kioxia is focused on developing initiatives to strengthen the competitiveness of its memory and SSD business, which it has developed over the past 35 years since inventing NAND flash memory in 1987. Kioxia remains committed to creating consistent and sustainable growth through timely capital investments that meet growing market demand.

Samsung Electronics is hit by a major scandal involving current and former employees. It's being alleged that these employees are involved in falsifying information about the semiconductor fabrication yields of the company's 3/4/5 nanometer nodes to clear them for commercial activity. This came to light when Samsung was observing lower than expected yields after the nodes were approved for mass-production of logic chips for Samsung, as well as third-party chip-designers. A falsified yield figure can have a cascading impact across the supply-chain, as wafer orders and pricing are decided on the basis of yields. Samsung however, has downplayed the severity of the matter. The group has initiated an investigation into Samsung Device Solutions, the business responsible for the foundry arm of the company. This includes a thorough financial audit of the foundry to investigate if the investments made to improve yields were properly used.

Toshiba Electronic Devices & Storage Corporation ("Toshiba") today announced that it will construct a new 300-milimeter wafer fabrication facility for power semiconductors at its main discrete semiconductor production base, Kaga Toshiba Electronics Corporation, in Ishikawa Prefecture. Construction will take place in two phases, allowing the pace of investment to be optimized against market trends, with the production start of Phase 1 scheduled for within fiscal 2024. When Phase 1 reaches full capacity, Toshiba's power semiconductor production capacity will be 2.5 times that of fiscal 2021.

Power devices are essential components for managing and reducing power consumption in every kind of electronic equipment, and for achieving a carbon neutral society. Current demand is expanding on vehicle electrification and the automation of industrial equipment, with very strong demand for low-voltage MOSFETs (metal oxide semiconductor field effect transistors) and IGBTs (insulated-gate bipolar transistors) and other devices. To date, Toshiba has met this demand growth by increasing production capacity on 200-milimeter lines, and expediting the start of production on 300-milimeter production lines from the first half of fiscal 2023 to the second half of fiscal 2022. Decisions on the new fab's overall capacity and equipment investment, the start of production, production capacity and production plan will reflect market trends.

ASML, makers of vital semiconductor fabrication machinery powering the world's leading fabs, including TSMC, provided its first damage-assessment of the fire incident at one of its component plants near Berlin, on January 3. This plant manufactures several mechanical and optical components of semiconductor fabrication machinery, such as wafer tables and clamps, reticle chucks and mirror blocks.

ASML, in a press-release, disclosed that production of components used in DUV (deep-ultraviolet) machines, has been restarted, as that area of the plant is unaffected by the fire. A region of the plant that manufactures wafer clamps for use in its EUV (extreme ultraviolet) machines, however, has been affected by the fire. The company is still in the process of coming up with a recovery plan for this area, and will come up with a tentative date for restart of production only after that. EUV lithography is leveraged for 5 nm and upcoming 3 nm silicon fabrication nodes at TSMC, Samsung, and Intel. TSMC is known to be ASML's largest customer. ASML stated that it will release its Q4-2021 and full-year 2021 financial results on January 19, and it may provide more updates on the matter.The press-release follows.

DDR5 may soon have reason to be an even more expensive early-adopter piece of tech than it currently is, according to electronic component supplier 12chip. While semiconductor manufacturers worldwide grapple with logistics and components shortages, the DRAM market has been left somewhat unscathed - up to now. DRAM fabrication - even DDR5 - isn't done on leading-edge nodes but on older, more mature ones (such as 14 nm). According to 12chip, manufacturers are having no problem in scaling their DRAM manufacturing on these older nodes to meet demand.

However, DDR5 is being directly impacted by the current logistics issues due to lack of adequate Power Management Integrated Circuit (PMIC) chips - which DDR5 has integrated in the DIMM proper. Currently, lead times for PMIC orders are estimated at 35 weeks, placing additional strain on system assemblers and DRAM manufacturers - and forcing delays and bottlenecks throughout the supply chain. Additionally, the fact that PMIC chips for DDR5 are ten times as expensive as equivalent DDR4 power management solutions doesn't bode well for future price action on DDR. Should this situation continue, higher prices for DDR5 modules are to be expected due to a deteriorating supply/demand ratio - particularly relevant if you're thinking about putting together a build based on Intel's Alder Lake platform. As always, take this report with a grain of salt.

While the global electronics supply chain experienced a chip shortage, the corresponding shortage of foundry capacities also led various foundries to raise their quotes, resulting in an over 20% YoY increase in the total annual revenues of the top 10 foundries for both 2020 and 2021, according to TrendForce's latest investigations. The top 10 foundries' annual revenue for 2021 is now expected to surpass US$100 billion. As TSMC leads yet another round of price hikes across the industry, annual foundry revenue for 2022 will likely reach US$117.69 billion, a 13.3% YoY increase.

TrendForce indicates that the combined CAPEX of the top 10 foundries surpassed US$50 billion in 2021, a 43% YoY increase. As new fab constructions and equipment move-ins gradually conclude next year, their combined CAPEX for 2022 is expected to undergo a 15% YoY increase and fall within the US$50-60 billion range. In addition, now that TSMC has officially announced the establishment of a new fab in Japan, total foundry CAPEX will likely increase further next year. TrendForce expects the foundry industry's total 8-inch and 12-inch wafer capacities to increase by 6% YoY and 14% YoY next year, respectively.

In an interview with the Washington Post, Intel CEO Pat Gelsinger shared some details on the company's plans to expand its foundry operations in the US. As part of the company's IDM 2.0 plan, the company aims to construct a new cutting edge fabrication complex that will cover both wafer manufacturing and advanced packaging technologies. While the final factory location still hasn't been disclosed, the company said it plans to build the complex in close proximity to universities - a way to facilitate the hiring process of qualified personnel and, perhaps, of establishing joint research and development. Intel expects this foundry complex to cost between $60 and $120 billion.

Intel CEO Pat GelsingerWe are looking broadly across the U.S.. This would be a very large site, so six to eight fab modules, and at each of those fab modules, between 10- and $15 billion. It's a project over the next decade on the order of $100 billion of capital, 10,000 direct jobs. 100,000 jobs are created as a result of those 10,000, by our experience. So, essentially, we want to build a little city."