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Kingston NV2 1 TB (SM2267XT + YMTC CDT1B)

1 TB
Capacity
SM2267XT
Controller
TLC
Flash
PCIe 4.0 x4
Interface
M.2 2280
Form Factor

Multiple hardware versions found.

Performance could vary due to unannounced flash/controller changes.

PCB Front
PCB Front
NAND Die
NAND Die
The Kingston NV2 is a solid-state drive in the M.2 2280 form factor. It is available in capacities ranging from 250 GB to 1 TB. This page reports specifications for the 1 TB variant. With the rest of the system, the Kingston NV2 interfaces using a PCI-Express 4.0 x4 connection. The SSD controller is the SM2267XT from Silicon Motion, a DRAM cache is not available. Kingston has installed 128-layer TLC NAND flash on the NV2, the flash chips are made by YMTC. Please note that this SSD is sold in multiple variants with different NAND flash or controller, which could affect performance, the "Notes" section at the end of this page has more info. To improve write speeds, a pseudo-SLC cache is used, so bursts of incoming writes are soaked up more quickly. Thanks to support for the fast PCI-Express 4.0 interface, performance is excellent. The NV2 is rated for sequential read speeds of up to 3,500 MB/s and 2,100 MB/s write.
At its launch, the SSD was priced at 80 USD. The warranty length is set to three years, which is above average, but shorter than the five years offered by many other vendors. Kingston guarantees an endurance rating of 320 TBW, a relatively low value compared to other SSDs.

Solid-State-Drive

Capacity: 1 TB (1000 GB)
Variants: 250 GB 500 GB 1 TB
Hardware Versions:
Overprovisioning: 92.7 GB / 10.0 %
Production: Active
Released: Unknown
Price at Launch: 80 USD
Part Number: SNV2S/1000G
Market: Consumer

Physical

Form Factor: M.2 2280 (Single-Sided)
Interface: PCIe 4.0 x4
Protocol: NVMe 1.4
Power Draw: 1.3 W (Idle)
3.7 W (Avg)
4.5 W (Max)

Controller

Manufacturer: Silicon Motion
Name: SM2267XT
Architecture: ARM 32-bit Cortex-R5
Core Count: Dual-Core
Frequency: 650 MHz
Foundry: TSMC
Process: 28 nm
Flash Channels: 4 @ 1,200 MT/s
Chip Enables: 4

NAND Flash

Manufacturer: YMTC
Name: Xtacking 2.0 (CDT1B)
Rebranded: (Rebranded by Kingston)
Type: TLC
Technology: 128-layer
Speed: 1600 MT/s
Capacity: 4 chips @ 2 Tbit
ONFI: 4.1
Topology: Charge Trap
Die Size: 60 mm²
(8.5 Gbit/mm²)
Dies per Chip: 4 dies @ 512 Gbit
Planes per Die: 4
Decks per Die: 2
Word Lines: 141 per NAND String
90.8% Vertical Efficiency
Read Time (tR): 50 µs
Program Time (tProg): 620 µs
Block Erase Time (tBERS): 9.0 ms
Die Read Speed: 1280 MB/s
Die Write Speed: 70 MB/s
Endurance:
(up to)
3000 P/E Cycles
Page Size: 16 KB
Block Size: 2304 Pages
Plane Size: 1980 Blocks

DRAM Cache

Type: None
Host-Memory-Buffer (HMB): 64 MB

Performance

Sequential Read: 3,500 MB/s
Sequential Write: 2,100 MB/s
Random Read: Unknown
Random Write: Unknown
Endurance: 320 TBW
Warranty: 3 Years
MTBF: 1.5 Million Hours
Drive Writes Per Day (DWPD): 0.3
SLC Write Cache: Yes

Features

TRIM: Yes
SMART: Yes
Power Loss Protection: No
Encryption:
  • No
RGB Lighting: No
PS5 Compatible: Yes

Notes

Drive:

Kingston might swap components in the future in order to meet the volume demands for this product

Controller:

The difference between this and the non-XT revision is that this revision doesn't support DRAM, in fact it supports HMB (Host Memory Buffer). Also, this revision has a different package (247-ball FCCSP).

NAND Die:

Read Time (tR): Maximum is 50 µs, typical is lower
Typical Program Time (tPROG): 620 µs
Maximum Program Time (tPROG): Maximum is 910 µs
Block Erase Time (tBERS): Maximum is 20 ms, typical is lower
Array Eficiency of over 92%
YMTC 128L Xtacking 2.0 cell architecture consists of two decks connected through deck-interface buffer layer which is the same process with KIOXIA 112L BiCS 3D NAND structure. Cell size, CSL pitch, and 9-hole VC layouts keep the same design and dimension (horizontal/vertical WL and BL pitches) with previous 64L Xtacking 1.0 cell. Total number of gates is 141 (141T) including selectors and dummy WLs for the TLC operation.
This layout has a 1x 4 Plane layout, each one lineup side by side

Jul 24th, 2024 19:33 EDT change timezone

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