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Phison E31T Engineering Sample 2 TB

2 TB
Capacity
Phison E31T
Controller
TLC
Flash
PCIe 5.0 x4
Interface
M.2 2280
Form Factor

This SSD is not released yet.

Data on this page may change in the future.

SSD Controller
Controller
NAND Die
NAND Die
The Phison E31T Engineering Sample will be a solid-state drive in the M.2 2280 form factor, that is expected to launch in 2024. It is only available in the 2 TB capacity listed on this page. With the rest of the system, the Phison E31T Engineering Sample interfaces using a PCI-Express 5.0 x4 connection. The SSD controller is the PS5031-E31T from Phison, a DRAM cache is not available. Phison has installed 218-layer TLC NAND flash on the E31T Engineering Sample, the flash chips are made by Kioxia. To improve write speeds, a pseudo-SLC cache is used, so bursts of incoming writes are absorbed more quickly. Thanks to support for the fast PCI-Express 5.0 interface, performance is excellent. The E31T Engineering Sample is rated for sequential read speeds of up to 10,800 MB/s and 10,800 MB/s write; random IO reaches 1500K IOPS for read and 1500K for writes.
We have no information regarding the price at release. The TBW rating for the Phison E31T Engineering Sample 2 TB is unknown, too. New information will be added to this page as soon as it becomes available.

Solid-State-Drive

Capacity: 2 TB (2000 GB)
Overprovisioning: 185.4 GB / 10.0 %
Production: Unreleased
Released: 2024
Part Number: Unknown
Market: Consumer

Physical

Form Factor: M.2 2280 (Single-Sided)
Interface: PCIe 5.0 x4
Protocol: NVMe 2.0
Power Draw: Unknown

Controller

Manufacturer: Phison
Name: PS5031-E31T
Architecture: ARM 32-bit Cortex-R5
Core Count: Triple-Core
Foundry: TSMC
Process: 7 nm
Flash Channels: 4 @ 3,600 MT/s
Chip Enables: 4
Controller Features: HMB (enabled)

NAND Flash

Manufacturer: Kioxia
Name: BiCS8
Part Number: T27HGB5A2V
Type: TLC
Technology: 218-layer
Speed: 3200 MT/s
Capacity: 2 chips @ 8 Tbit
Toggle: 5.1
Topology: Charge Trap
Die Size: 60 mm²
(17.1 Gbit/mm²)
Dies per Chip: 8 dies @ 1 Tbit
Planes per Die: 4
Decks per Die: 2
Read Time (tR): 40 µs
Die Write Speed: 205 MB/s
Page Size: 16 KB

DRAM Cache

Type: None
Host-Memory-Buffer (HMB): 64 MB

Performance

Sequential Read: 10,800 MB/s
Sequential Write: 10,800 MB/s
Random Read: 1,500,000 IOPS
Random Write: 1,500,000 IOPS
Endurance: Unknown
Warranty: Unknown
SLC Write Cache: Yes

Features

TRIM: Yes
SMART: Yes
Power Loss Protection: No
Encryption:
  • AES-256
RGB Lighting: No
PS5 Compatible: Yes

Notes

NAND Die:

This chip is comprised of 8 physical planes (sub planes) with 8KB WLs working as 4 logical planes to keep short BL and WL latency.
tPROG: Could be between 312µs and 624µs

Jun 30th, 2024 07:33 EDT change timezone

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