Wednesday, August 26th 2009

AMD Demos 48-core ''Magny-Cours'' System, Details Architecture

Earlier slated coarsely for 2010, AMD fine-tuned the expected release time-frame of its 12-core "Magny-Cours" Opteron processors to be within Q1 2010. The company seems to be ready with the processors, and has demonstrated a 4 socket, 48 core machine based on these processors. Magny Cours holds symbolism in being one of the last processor designs by AMD before it moves over to "Bulldozer", the next processor design by AMD built from ground-up. Its release will provide competition to Intel's multi-core processors available at that point.

AMD's Pat Conway at the IEEE Hot Chips 21 conference presented the Magny-Cours design that include several key design changes that boost parallelism and efficiency in a high-density computing environment. Key features include: Move to socket G34 (from socket-F), 12-cores, use of a multi-chip module (MCM) package to house two 6-core dies (nodes), quad-channel DDR3 memory interface, and HyperTransport 3 6.4 GT/s with redesigned multi-node topologies. Let's put some of these under the watch-glass.
Socket and Package
Loading 12 cores onto a single package and maintaining sufficient system and memory bandwidth would have been a challenge. With the Istanbul six-core monolothic die already measuring 346 mm² with a transistor-load of 904 million, making something monolithic twice the size is inconceivable, at least on the existing 45 nm SOI process. The company finally broke its contemptuous stance on multi-chip modules which it ridiculed back in the days of the Pentium D, and designed one of its own. Since each die is a little more than a CPU (in having a dual-channel memory controller, AMD chooses to call it a "node", a cluster of six processing cores that connects to its neighbour on the same package using one of its four 16-bit HyperTransport links. The rest are available to connect to neighbouring sockets and the system in 2P and 4P multi-socket topologies.

The socket itself gets a revamp from the existing 1,207-pin Socket-F, to the 1,974-pin Socket G34. The high pin-count ensures connections to HyperTransport links, four DDR3 memory connections, and other low-level IO.

Multi-Socket Topologies
A Magny-Cours Opteron processor can work in 2P and 4P systems for up to 48 physical processing cores. The multi-socket technologies AMD devised ensures high inter-core and inter-node bandwidth without depending on the system chipset IO for the task. In the 2P topology, one node from each socket uses one of its HyperTransport 16-bit links to connect to the system, the other to the neighbouring node on the package, and the remaining links to connect to the nodes of the neighbouring socket. It is indicated that AMD will make use of 6.4 GT/s links (probably generation 3.1). In 4P systems, it uses 8-bit links instead, to connect to three other sockets, but ensures each node is connected to the other directly, on indirectly over the MCM. With a total of 16 DDR3 DCTs in a 4P system, a staggering 170.4 GB/s of cumulative memory bandwidth is achieved.

Finally, AMD projects a up to 100% scaling with Magny-Cours compared to Istanbul. Its "future-silicon" projected for 2011 is projected to almost double that.
Source: INPAI
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104 Comments on AMD Demos 48-core ''Magny-Cours'' System, Details Architecture

#1
FreedomEclipse
~Technological Technocrat~
Christ on a bike 48core??? F@H Here i come!!
Posted on Reply
#2
mdm-adph
FreedomEclipseChrist on a bike 48core??? F@H Here i come!!
Bah -- it's an impressive setup, but you could probably still do more folding with a few GTX 295's, right?
Posted on Reply
#3
AlienIsGOD
Vanguard Beta Tester
Its still impressive nonetheless. A native 12 core Proc OHHEMMGEE!!!
Posted on Reply
#4
A Cheese Danish
Hooray for 12 core Opty's! :D
I may have to get a few :rolleyes:
Posted on Reply
#5
Mussels
Freshwater Moderator
Jeebers help us all...
Posted on Reply
#6
human_error
AlienIsGODIts still impressive nonetheless. A native 12 core Proc OHHEMMGEE!!!
Actually it is 2 native 6 cores in one package like the Core 2 Quad processors (which were 2 dual cores in one package). This means that the shared L3 is shared between two sets of six cores and not across all 12 cores and that each 6 cores only has dual channel memory as opposed to having quad channel across 12 cores - it just means if one core needs more bandwidth than dual channel can provide then it would bottleneck but in such a multithreaded environment anything running on that would have to be designed to run on multi-cpu setups (which would also limit max bandwidth available to one core at a time to be dual channel speeds) anyway.
Posted on Reply
#7
Unregistered
i think you have a typo, "multi-chip module (MXM)"

i think it should be MCM not MXM


MXM is for GPU on laptop
Posted on Edit | Reply
#8
Velvet Wafer
GIVE IT TO ME!^^

48 crunching tabs running 24/7 a 3ghz....:eek: YEAH:D
Posted on Reply
#9
tidas
FreedomEclipseChrist on a bike 48core??? F@H Here i come!!
yes....but can it crysis?
Posted on Reply
#10
Castiel
I want one. Would go great with my network design.
Posted on Reply
#11
Mussels
Freshwater Moderator
tidasyes....but can it crysis?
in software mode, most likely.
Posted on Reply
#12
Breathless
what ever happened to "real men use real cores". ;)

This isn't 12 "real" cores....
Posted on Reply
#13
[I.R.A]_FBi
they are real, really glued together ....
Posted on Reply
#14
Mussels
Freshwater Moderator
Breathlesswhat ever happened to "real men use real cores". ;)

This isn't 12 "real" cores....
it is in fact 12 real cores.

the 'less than real' cores refers to hyperthreading, not the sticky tape approach.
Posted on Reply
#15
mdm-adph
Breathlesswhat ever happened to "real men use real cores". ;)

This isn't 12 "real" cores....
No, they are 12 "real" cores, but this isn't a "real" 12-core. Make sense? :laugh:
Posted on Reply
#16
Kitkat
Musselsit is in fact 12 real cores.

the 'less than real' cores refers to hyperthreading, not the sticky tape approach.
i spit my coffee lol
Posted on Reply
#17
Velvet Wafer
if this isnt a 12 core, core quad wont be a quad;) multipacking makes no difference
Posted on Reply
#18
thezorro
intel is losing the war, what happened to the tick tock? or is tic tac?
just my two cents
Posted on Reply
#19
TheMailMan78
Big Member
Damn it someone beat me to the Crysis joke. Not only that they registered to do it :laugh:
thezorrointel is losing the war, what happened to the tick tock? or is tic tac?
just my two cents
Dude your lost on this.
Posted on Reply
#20
a111087
thezorrointel is losing the war, what happened to the tick tock? or is tic tac?
just my two cents
I wouldn't be so quick about it. from what i've seen, these 12-cores will not come to desktops, not anytime soon, at least.
Posted on Reply
#21
El Fiendo
thezorrointel is losing the war, what happened to the tick tock? or is tic tac?
just my two cents
Intel's market share: 79.1% in the fourth quarter of 2008
AMD's market share: 12.8% in the fourth quarter of 2008


I wish I could lose at girls as well as Intel is said to be losing to AMD. I'd be rolling on a pile of women whilst giggling with glee every night.
Posted on Reply
#22
TheMailMan78
Big Member
El FiendoIntel's market share: 79.1% in the fourth quarter of 2008
AMD's market share: 12.8% in the fourth quarter of 2008


I wish I could lose at girls as well as Intel is said to be losing to AMD. I'd be rolling on a pile of women whilst giggling with glee every night.
You still can with enough methamphetamines.
Posted on Reply
#23
El Fiendo
So copious amounts of meth is Intel's key to success as well then? Or is that strictly a me only scenario?
Posted on Reply
#24
Unregistered
Yea AMD! W00T!

But what I really want to say is directed at themailman.

Are you listening?

That avatar is genuinely disturbing.

I'll let you know in a couple days if that is compliment or not.

Carry on.
Posted on Edit | Reply
#25
aj28
mdm-adphNo, they are 12 "real" cores, but this isn't a "real" 12-core. Make sense? :laugh:
No, because the comment referenced was originally made as an argument against the idea that hyper-threading meant your processor had some sort of "virtual core" count equal to double your actual cores. They used entirely different terminology in arguing against the use of MXM.
thezorrointel is losing the war, what happened to the tick tock? or is tic tac?
just my two cents
I wouldn't say so, because these aren't designed to be desktop chips. Then again, if you ask me, i7 is a server chip too. It really has no place in the desktop market today because it provides such limited benefits to home users, at a huge increase in cost. AMD could release this thing on the desktop side if they wanted to, but the fact of the matter is it would be a bloated, power-sucking piece of junk which, while hella fast, gives no tangible advantage to the vast majority of users in that piece of the market... Just like i7.
Posted on Reply
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