Friday, May 13th 2016
More Polaris10 and Polaris11 Specifications Revealed
Industry sources revealed to TechPowerUp some pretty interesting specifications of AMD's two upcoming GPUs based on the 4th generation Graphics CoreNext "Polaris" architecture. The company is preparing a performance-segment GPU and a mainstream one. It turns out, that the performance-segment chip, which the press has been referring to as "Ellesmere," could feature 32 compute units (CUs), and not the previously thought 40.
Assuming that each CU continues to consist of 64 stream processors (SP), you're looking at an SP count of 2,048. What's more, this chip is said to offer a single-precision floating point performance of 5.5 TFLOP/s, as claimed by AMD. To put this into perspective, the company had claimed 5.2 TFLOP/s for the "Hawaii"/"Grenada" based FirePro W9100, which launched earlier this February, and that SKU featured all 2,816 SP present on the chip. So this chip is definitely faster than most "Hawaii" based SKUs.
While "Hawaii" based SKUs feature TDP of no less than 250W, the new chip has a TDP rated no higher than 150W. AMD could pull off a "single 8-pin power connector" feat like NVIDIA, with quite some headroom to spare. The chip features a 256-bit wide GDDR5/GDDR5X memory interface, and 8 GB could be its standard memory amount. The first SKUs based on this chip could feature 7 Gbps GDDR5 memory.
AMD will upgrade the feature-set to include HVEC/H.265 hardware encode/decode acceleration, DisplayPort 1.3, and HDMI 2.0a outputs.
The smaller "Polaris" chip scheduled for 2016, which the press has been referring to as "Baffin," could feature 14 compute units, working out to a stream processor count of 896. It will be a mainstream chip, succeeding the "Tobago" silicon, which drives the current R7 360 series SKUs, although it wouldn't surprise us if it outperformed bigger chips, such as the "Trinidad" based R7 370 series. This chip has its peak single-precision floating-point performance rated at 2.5 TFLOP/s. Its TDP is rated at just 50W, and it is expected to feature a 128-bit wide GDDR5 memory interface, holding 4 GB of memory.
Assuming that each CU continues to consist of 64 stream processors (SP), you're looking at an SP count of 2,048. What's more, this chip is said to offer a single-precision floating point performance of 5.5 TFLOP/s, as claimed by AMD. To put this into perspective, the company had claimed 5.2 TFLOP/s for the "Hawaii"/"Grenada" based FirePro W9100, which launched earlier this February, and that SKU featured all 2,816 SP present on the chip. So this chip is definitely faster than most "Hawaii" based SKUs.
AMD will upgrade the feature-set to include HVEC/H.265 hardware encode/decode acceleration, DisplayPort 1.3, and HDMI 2.0a outputs.
The smaller "Polaris" chip scheduled for 2016, which the press has been referring to as "Baffin," could feature 14 compute units, working out to a stream processor count of 896. It will be a mainstream chip, succeeding the "Tobago" silicon, which drives the current R7 360 series SKUs, although it wouldn't surprise us if it outperformed bigger chips, such as the "Trinidad" based R7 370 series. This chip has its peak single-precision floating-point performance rated at 2.5 TFLOP/s. Its TDP is rated at just 50W, and it is expected to feature a 128-bit wide GDDR5 memory interface, holding 4 GB of memory.
133 Comments on More Polaris10 and Polaris11 Specifications Revealed
It helps with Sli
NVLink is not available on graphics cards.
- Old bridges were running at below 600mhz
- Newer bridges (LED & HB) bridges can run at +600mhz
Old SLI used a combo of SLI bridge along with PCI-E talk to achieve SLI in resolutions exceeding 1440p@60 (ie 1440@120 was SLI+PCI-E)HB Bridges will allow up to 5k over SLI Bridge without the need for PCI-E talk in 2-way SLI.
He also points out that Nvidia prefers LDA Explicit for multi GPUs instead of MDA. Not sure if that will be part of their GameWorks initiative but not good for consumers that want to mix different GPUs.
Pcie Express has 82 pins, an SLI connector is 26 pins, an actualy NVLink Interface consists of 2x 400-pins connectors.
Stick to facts and I don't have an issue with what you say.