Monday, March 27th 2017
AMD Ryzen Quad-Core 2+2 vs. 4+0 Core Distributions Compared
With AMD readying quad-core variants of its Ryzen "Summit Ridge" processor, the question on everyone's minds is whether the chip features two quad-core compute complexes (CCX) with two cores enabled, each, or just one CCX, given that the L3 cache amount being advertised by the company is 8 MB (that of one CCX), in comparison to 6-core Ryzen parts receiving the full 16 MB (8 MB per CCX) available on the silicon. While we will be able to definitively answer that question on the 11th of April, a new UEFI firmware by ASUS for its Crosshair VI Hero motherboard lets users not just disable cores, but also the distribution of the disabled cores.
CPU cores on the Ryzen "Summit Ridge" processor are distributed in two groups of four cores, each, called the quad-core compute complex (CCX). Each CCX has an 8 MB L3 cache, and so the ideal way of distributing cores on lower core-count models would be to disable an equal number of cores per CCX. For 6-core chips, one core is disabled per CCX, resulting in a 3+3 configuration. For quad-core chips, however, you can either disable all four cores in a CCX (4+0 configuration), or do a purportedly more optimal 2+2 configuration, with two cores disabled per CCX. Hardware Unboxed took advantage of ASUS' new UEFI firmware to compare the 4+0 configuration to the 2+2 configuration. The results are somewhat surprising.As you can see in the graphs above, there is practically no performance difference between the 4+0 configuration and the 2+2 configuration. In fact, the 4+0 configuration is mildly faster in some scenarios. AMD already advertised quad-core Ryzen parts to feature just 8 MB of L3 cache, and so it could make more sense to keep all 8 MB in one CCX, and disable an entire CCX to run the chip in a 4+0 configuration, than disabling 4 MB per CCX, and running it in a 2+2 configuration. This way, a single core can dump >4 MB of data onto the L3 cache it addresses (as opposed to being limited to 4 MB in a 2+2 configuration with just 4 MB per CCX). Inter-CCX communication may be fast, but not fast enough to make a core from one CCX address the L3 cache of another CCX (which by the way is not possible, according to AMD). This is what makes 4+0 a more desirable configuration for the upcoming quad-core Ryzen parts, than 2+2.
Source:
Hardware Unboxed (YouTube)
CPU cores on the Ryzen "Summit Ridge" processor are distributed in two groups of four cores, each, called the quad-core compute complex (CCX). Each CCX has an 8 MB L3 cache, and so the ideal way of distributing cores on lower core-count models would be to disable an equal number of cores per CCX. For 6-core chips, one core is disabled per CCX, resulting in a 3+3 configuration. For quad-core chips, however, you can either disable all four cores in a CCX (4+0 configuration), or do a purportedly more optimal 2+2 configuration, with two cores disabled per CCX. Hardware Unboxed took advantage of ASUS' new UEFI firmware to compare the 4+0 configuration to the 2+2 configuration. The results are somewhat surprising.As you can see in the graphs above, there is practically no performance difference between the 4+0 configuration and the 2+2 configuration. In fact, the 4+0 configuration is mildly faster in some scenarios. AMD already advertised quad-core Ryzen parts to feature just 8 MB of L3 cache, and so it could make more sense to keep all 8 MB in one CCX, and disable an entire CCX to run the chip in a 4+0 configuration, than disabling 4 MB per CCX, and running it in a 2+2 configuration. This way, a single core can dump >4 MB of data onto the L3 cache it addresses (as opposed to being limited to 4 MB in a 2+2 configuration with just 4 MB per CCX). Inter-CCX communication may be fast, but not fast enough to make a core from one CCX address the L3 cache of another CCX (which by the way is not possible, according to AMD). This is what makes 4+0 a more desirable configuration for the upcoming quad-core Ryzen parts, than 2+2.
27 Comments on AMD Ryzen Quad-Core 2+2 vs. 4+0 Core Distributions Compared
Still, I don't think the difference would be enough to write home about. Though I still think AMD is going to release the first generation of Ryzen 3/5 as 2+2 configurations, to get rid of the damaged dies. Then they'll relelase a "new and improved" Ryzen 3/5 with "much better performance" that is really just a single CCX quad-core and the performance comes entirely from eliminating the cross-talk between the CCXs and amounts to a couple % improvement.
1400 is said to have 8MB total cache, and being an inferior product we can expect it to perform worse than 1500X in worst-case scenarios (where L3 cache size matters), clock-to-clock, assuming it also comes in a 2+2 config as also claimed by Anandtech to have been confirmed by AMD.
Anandtech link: www.anandtech.com/show/11202/amd-announces-ryzen-5-april-11th
This situation with Ryzen right now is so awfully similar to back then. I remember the Core 2 Duo was beating the Core 2 Quad in almost everything (specially gaming ) and people doing exactly like what they are doing with Ryzen right now, comparing core count. I still remember " It doesn't matter .. unless if you are using it for special applications..." .
I miss the days of UT2004. :pimp:
Nonetheless my upgrade is long overdue and I am pretty much sold on ryzen 1700.
"As you can see in the graphs above, there is practically no performance difference between the 4+0 configuration and the 2+2 configuration. In fact, the 4+0 configuration is mildly faster in some scenarios."
"This is what makes 4+0 a more desirable configuration for the upcoming quad-core Ryzen parts, than 2+2."
You just said that there was no performance difference and then your conclusion is that the 4+0 is better?
In scientific application 2+2 configuration with 16M L3 is much more desired. Also from the base clock of 2+2 16M L3, it can go close to 4GHz much easier. So in the end you cannot just say 4+0 is more desirable basing solely on a simulated test on some games.