Friday, October 25th 2019

Intel Introduces Tremont Microarchitecture

Today at the Linley Fall Processor Conference in Santa Clara, Calif., Intel revealed the first architectural details related to Tremont. Intel's newest and most advanced low-power x86 CPU architecture, Tremont offers a significant performance boost over prior generations. "Tremont is Intel's most advanced low-power x86 architecture to date. We focused on a range of modern, complex workloads, while considering networking, client, browser and battery so that we could raise performance efficiently across the board. It is a world-class CPU architecture designed for enhanced processing power in compact, low-power packages," Stephen Robinson, Intel Tremont Chief Architect.

Tremont next-generation low-power x86 microarchitecture delivers significant IPC (instructions per cycle) gains gen-over-gen compared with Intel's prior low-power x86 architectures. Designed for enhanced processing power in compact, low-power packages, Tremont-based processors will enable a new generation of innovative form factors for client devices, creative applications for the internet of things (IoT), efficient data center products and more.
When combined with other technologies across Intel's broader IP portfolio, this architecture will enable a new generation of products. Using Intel's 3D packaging technology Foveros, Tremont is integrated within a wider set of silicon IPs in Lakefield, which will power breakthrough innovative devices like the recently announced dual-screen Microsoft Surface Neo.

Performant architectures are the foundation of chips that capture and process data. Low-power solutions are essential to enabling new use cases driven by smaller form factors.

The Details: Intel Tremont includes several advancements in ISA (instruction set architecture), microarchitecture, security and power management. It delivers significant IPC gains gen-over-gen as compared with Intel's prior low-power x86 architectures, making it a first-class offering for powering a new generation of Intel products across client, IoT and data center offerings. Tremont's unique 6-wide (2x3-wide clustered) out-of-order decoder in the front end allows for a more efficient feed to the wider back end, which is fundamental for performance.

For more complete information about performance and benchmark results, visit Intel's Performance Benchmark page.

The presentation follows.
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9 Comments on Intel Introduces Tremont Microarchitecture

#2
ShurikN
Intel revealed the first architectural details related to Tremont.
Cool, cool, cool...
Intel's newest and most advanced low-power x86 CPU architecture
K, bye.
Posted on Reply
#3
ZoneDymo
Your daily Intel news is brought to you by the new Intel Marketing Division, Intel Marketing: "we wont let you forget us"
Posted on Reply
#4
ratirt
Another PBS specials about computer's technology :)
Posted on Reply
#5
R0H1T
ZoneDymoYour daily Intel news is brought to you by the new Intel Marketing Division, Intel Marketing: "we wont let you forget us"
I wonder if this is apt here :pimp:
Posted on Reply
#6
Vayra86
When you can't talk about performance...



Tsk tsk
Posted on Reply
#7
_UV_
Vayra86When you can't talk about performance...
Core microarch (Pentium M, Core Solo, Core Duo) was first introduced in mobile segment because of Pentium 4 was too power hungry. And if they have something to improve performance it will be later adopted to desktop/server products.
And if you like that average phone (like those with Snapdragon 625) lasts from 1 charge up to 3-4 days, why you don't want average portable device to work at least 12 hours during daily tasks like web browsing with YT.
Posted on Reply
#9
Vya Domus
_UV_And if you like that average phone (like those with Snapdragon 625) lasts from 1 charge up to 3-4 days, why you don't want average portable device to work at least 12 hours during daily tasks like web browsing with YT.
Most ARM SoCs have single digit power consumption figures, even with burst clock speeds. Intel hasn't and I don't think they'll ever catch up in this regard.
Posted on Reply
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