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AMD EPYC 9755

128
Cores
256
Threads
500 W
TDP
2.7 GHz
Frequency
4.1 GHz
Boost
Turin
Codename
Socket SP5
Socket
Front
Front
Delidded
Delidded
Die Shot
Die Shot
Back
Back
Connectivity
Connectivity
AMD Socket SP5
AMD Socket SP5
The AMD EPYC 9755 is a server/workstation processor with 128 cores, launched in October 2024, at an MSRP of $12984. It is part of the EPYC lineup, using the Zen 5 (Turin) architecture with Socket SP5. Thanks to AMD Simultaneous Multithreading (SMT) the core-count is effectively doubled, to 256 threads. To further increase overall system performance, up to two EPYC 9755 CPUs can link up in a multi-processor (SMP) configuration. EPYC 9755 has 512 MB of L3 cache and operates at 2.7 GHz by default, but can boost up to 4.1 GHz, depending on the workload. AMD is building the EPYC 9755 on a 4 nm production process using 133,040 million transistors. The silicon die of the chip is not fabricated at AMD, but at the foundry of TSMC. The multiplier is locked on EPYC 9755, which limits its overclocking capabilities.
With a TDP of 500 W, the EPYC 9755 is extremely power hungry, which means you need top-notch cooling. AMD's processor supports DDR5 memory with a twelve-channel interface. The highest officially supported memory speed is 6000 MT/s, but with overclocking (and the right memory modules) you can go even higher. ECC memory is supported, too, which is an important capability for mission-critical systems, to avoid data corruption. For communication with other components in the machine, EPYC 9755 uses a PCI-Express Gen 5 connection. This processor lacks integrated graphics, you might need a graphics card.
Hardware virtualization is available on the EPYC 9755, which greatly improves virtual machine performance. Programs using Advanced Vector Extensions (AVX) will run on this processor, boosting performance for calculation-heavy applications. Besides AVX, AMD has added support for the newer AVX2 and AVX-512 instructions, too.

Physical

Socket: AMD Socket SP5
Foundry: TSMC
Process Size: 4 nm
Transistors: 133,040 million
Die Size: 16x 70.6 mm²
I/O Process Size:6 nm
Package: FC-LGA6096

Processor

Market: Server/Workstation
Production Status: Active
Release Date: Oct 10th, 2024
Launch Price: $12984
Part#: 100-000001443

Performance

Frequency: 2.7 GHz
Turbo Clock: up to 4.1 GHz
Base Clock: 100 MHz
Multiplier: 27.0x
Multiplier Unlocked: No
TDP: 500 W
Configurable TDP:450-500 W

Architecture

Codename: Turin
Generation: EPYC
(Zen 5 (Turin))
Memory Support: DDR5
Rated Speed: 6000 MT/s
2DPC Rated Speed:4400 MT/s
Memory Bus: Twelve-channel
ECC Memory: Yes
PCI-Express: Gen 5, 128 Lanes
(CPU only)
CXL:Gen 2.0

Core Config

# of Cores: 128
# of Threads: 256
SMP # CPUs: 2
Integrated Graphics: N/A

Cache

Cache L1: 80 KB (per core)
Cache L2: 1 MB (per core)
Cache L3: 512 MB (shared)

Features

  • MMX
  • SSE
  • SSE2
  • SSE3
  • SSSE3
  • SSE4A
  • SSE4.1
  • SSE4.2
  • AES
  • AVX
  • AVX2
  • AVX-512
  • AVX-VNNI
  • VNNI/VEX
  • BMI1
  • BMI2
  • BFloat16
  • SHA
  • F16C
  • FMA3
  • AMD64
  • EVP
  • AMD-V
  • SMAP
  • SMEP
  • X2AVIC
  • AIBRS
  • SEV-SNP
  • 5-level NPT
  • SMT
  • Precision Boost 2

Notes

CXL 2.0 supports Type 3 devices which can provide significant increases to system attached DRAM capacity. SEV-SNP security features extend to Type 3 devices.

AMD's "Turin" CPUs can be configured for DDR5 6400 MT/s with 1 DIMM per channel (1DPC) in specific scenarios, but 6000 MT/s is the official supported rating for the SP5 platform with firmware updates provided.
Oct 15th, 2024 11:17 EDT change timezone

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