Optimus Foundation CPU Block - AMD

[VSG]

Look at what we have here

 

[Zach_01]

Intel blocks, yes?
When will you build a Ry-ZEN2 test bench?

 

[lorry]

he goes through what you have just been discussing @Zach_01

Look at what we have here

They don't look very 'zen' like

 

[Zach_01]

Elaborating on how lower temperatures can improve voltage tolerance.

Oh this is even better than last one about degradation.
One should all watch and especially the ZEN2 overclockers

 

[VSG]

Intel blocks, yes?
When will you build a Ry-ZEN2 test bench?

When someone gives me the hardware for that, can't afford to buy new stuff myself all the time

 

[PolRoger]

Love the CorkBench, definitely pro level, no time here for cases

How do those numbers compare to previous results?

Most of my setups are run open bench style down in my basement computer room (my wife dislikes the cluttered "man-cave" with spare parts/boxes all about on shelves etc.). Her computer is in regular mid sized ATX tower and I also have a mini-ITX cube box running upstairs in the kitchen/family room.

I'll have to do more testing regarding the temps between various setups.

Before installing the Optimus block I was running this 3900X/ASRock X570 Taichi combo with a stock Prism cooler at 3.8GHz all core and 1.1v fixed vcore. While running WCG... The full load temps were running middle to upper 60's C. while default PBO ran too hot... ~ mid to upper 80's C.

Previous screen shot was running the two (200mm) fans on the Phobya 400 rad with 5v adapters. Here is a default PBO and DOCP memory settings (bumped up to 3333 from 3200) and LLC set to full/max droop. The 200mm fans are also running full speed 12v (~900RPM).

PBO Temp/Voltage/Power WCG load:

PBO effective clocks WCG load:

The quality of the Optimus block and mounting hardware is very nice but I think the mounting process for AMD board is currently a little "fiddly"...

My criticism relates to the fact that I think you all are using the same mounting posts (#3) in the supplied mounting diagram for both Intel 115X and AMD AM4.

I believe that Intel 115X motherboards have smaller holes when the bottom bracket is removed while AM4 motherboard have larger holes. The bracket posts seems like they were designed for Intel 115X as the collar of the mounting stud/post is too small for the larger AM4 holes. That collar and or bottom threaded portion of the stud needs to be of a larger diameter so the post doesn't fit loosely in the larger AM4 holes. I did utilize the included plastic washer on the top side of the motherboard holes. The provided bottom nuts (#4) are large enough in diameter and smoothly finished that I chose not to install plastic washers on the bottom side of the motherboard.

I think if I were running an Intel Optimus Foundation block on a an 115X motherboard... I believe your current mounting solution would work fine.

 

[lorry]

The quality of the Optimus block and mounting hardware is very nice but I think the mounting process for AMD board is currently a little "fiddly"...

My criticism relates to the fact that I think you all are using the same mounting posts (#3) in the supplied mounting diagram for both Intel 115X and AMD AM4.

I believe that Intel 115X motherboards have smaller holes when the bottom bracket is removed while AM4 motherboard have larger holes. The bracket posts seems like they were designed for Intel 115X as the collar of the mounting stud/post is too small for the larger AM4 holes. That collar and or bottom threaded portion of the stud needs to be of a larger diameter so the post doesn't fit loosely in the larger AM4 holes. I did utilize the included plastic washer on the top side of the motherboard holes. The provided bottom nuts (#4) are large enough in diameter and smoothly finished that I chose not to install plastic washers on the bottom side of the motherboard.

I think if I were running an Intel Optimus Foundation block on a an 115X motherboard... I believe your current mounting solution would work fine.

Would something like electrical tape be a work-around for that?
Shouldn't need to be done I know, but...

 

[Optimus Water Cooling]

And, yes, the AMD mounting isn't as convenient, we're working on an update.

Really, once mounted, the performance is identical. Because the pressure applied is then on the back thumb nuts and on the IHS itself, the pressure isn't on the standoff.

So really unless one is having trouble mounting the block (like in some super heavy case or server or something), there isn't any need to get modding the mounting. The current mounting will provide excellent performance, just not as easily as it could be

 

[lorry]

And, yes, the AMD mounting isn't as convenient, we're working on an update.

Really, once mounted, the performance is identical. Because the pressure applied is then on the back thumb nuts and on the IHS itself, the pressure isn't on the standoff.

So really unless one is having trouble mounting the block (like in some super heavy case or server or something), there isn't any need to get modding the mounting. The current mounting will provide excellent performance, just not as easily as it could be

Why go to all the effort of producing a new high quality product and then finish it off with suboptimum parts though? That now smacks of 'cheapening' the products and your company by reusing a part that wasn't designed for it's intended use here.
Surely that defeats your efforts in trying to put out a top of the line product that will get talked about by word of mouth?
(I would also suggest adding some written instructions to the pictures as well for the future line-ups, helps to promote a higher image of the company)

 

[Optimus Water Cooling]

I'd say a little perspective would be helpful because the AMD mounting discussion is really blown way out of proportion

First, the Foundation AMD block with the included mounting hardware proved to be the best block in the world, and not by a little (mileage will vary, of course).

Also, while the mounting isn't as user friendly as it theoretically could be, it is, in my opinion, far easier than mounting systems with tons of little parts and washers and springs that are just a pain to make work.

Plus, our mounting just performs better than the classic spring/backplate design

VSG might be able to speak to this eventually.

So we're making constant improvements as we go along and get feedback. I'd say we're way faster than most anyone else for responding and addressing concerns. But here, there is absolutely zero reason not to use the included mounting system in its stock configuration. This was discussed at crazy lengths over at OCN in that massive thread around 1600 posts now. Switching to anything else (like another brands' mounting) would be a step back for performance, though might be easier to assemble.

At the same time, this is one of those things where we're a tiny company compared to everyone else (or to the world, lol). There is just one engineer/machinist mastermind who develops everything, and that will be the way it is going forward. We don't have an army of people to work on this stuff. So if we revise mounting hardware, that takes away from releasing the Threadripper and GPU blocks.

Again, this is an issue with zero performance repercussions and is purely about ease of assembly.

So we're trying hard to keep up with changes, new products and actual manufacturing. We'd like to get even faster, but overall I think we're doing pretty good

Also, here are the instructions included with blocks:

 

[Zach_01]

PBO Temp/Voltage/Power WCG load:

PBO effective clocks WCG load:

Thats great results, and I'm talking about the temperature, and clock of 4150+MHz.
I can see the CPU is hitting almost all stock PBO limits of PPT:142/TDC:95/EDC:140 and that is because of your sub-70°C temp. Not often to see this. Because of relatively low temps the silicon manager is pushing CPU to the registered limits. Low temps give more headroom for all the limits but they stop at their factory sets.
Have you consider releasing them? It will give you potential more clock. And this is still within the stock silicon parameters.

May I suggest a few settings to try?

1. Just limits release (this may increase clocks marginally)
PPT: 147W
TDC:100A
EDC: 145A
PBOscalar: Auto

2. EDC capping (this will give more clocking)
PPT: 145W
TDC:100A
EDC: 130A (feel free to reduce it more)
PBOscalar: Auto

3. EDC capping and clock/voltage preservation (this certainly will give better clocking)
PPT: 145W
TDC:100A
EDC: 130A (feel free to reduce it more)
PBOscalar: X2 (Auto is X1, X2 mean longer and sustained clock and voltage. May increase temp a few degrees = 3~4C)

Nothing of this will have any dangerous outcome for the CPU, as you still relay on the internal silicon manager to adjust clock and voltage, known also as FIT (Silicon FITness controller).
This has nothing to do with manual/static OC which is disabling FIT.

 

[PolRoger]

Thats great results, and I'm talking about the temperature, and clock of 4150+MHz.
I can see the CPU is hitting almost all stock PBO limits of PPT:142/TDC:95/EDC:140 and that is because of your sub-70°C temp. Not often to see this. Because of relatively low temps the silicon manager is pushing CPU to the registered limits. Low temps give more headroom for all the limits but they stop at their factory sets.
Have you consider releasing them? It will give you potential more clock. And this is still within the stock silicon parameters.

May I suggest a few settings to try?

1. Just limits release (this may increase clocks marginally)
PPT: 147W
TDC:100A
EDC: 145A
PBOscalar: Auto

2. EDC capping (this will give more clocking)
PPT: 145W
TDC:100A
EDC: 130A (feel free to reduce it more)
PBOscalar: Auto

3. EDC capping and clock/voltage preservation (this certainly will give better clocking)
PPT: 145W
TDC:100A
EDC: 130A (feel free to reduce it more)
PBOscalar: X2 (Auto is X1, X2 mean longer and sustained clock and voltage. May increase temp a few degrees = 3~4C)

Nothing of this will have any dangerous outcome for the CPU, as you still relay on the internal silicon manager to adjust clock and voltage, known also as FIT (Silicon FITness controller).
This has nothing to do with manual/static OC which is disabling FIT.

Here is #1 PBO with PPT/TDC/EDC adjustments made via Ryzen Master and memory speed set to 3600C16...
Cinebench R20:

Currently... I'm not really sure that I understand how EDC capping in #2 and #3 can improve PBO clocks?

 

[Zach_01]

Here is #1 PBO with PPT/TDC/EDC adjustments made via Ryzen Master and memory speed set to 3600C16...
Cinebench R20:

Currently... I'm not really sure that I understand how EDC capping in #2 and #3 can improve PBO clocks?

Ok, the shot shows that you hit the EDC limit of 145A but, did this improve anything from previous stock condition? Is that 7459 ->> 7517 a gain out of this?
Do you have values of PPT/TDC/EDC running R20 with stock PBO settings?

To capture the R20 run into screenshot the best possible way, do the following if you like.
Open HWiNFO window in a way that are visible all "Core X VID", "Core X effective clock" including the "Average Eff Clock", CPU temps (Tctl/Tdie and CCDs) and the PPT/TDC/EDC values(W/A) and limits(%).
Open R20 in a way that you can see the "reset values" button (Clock down right) of HW.
Start the R20 run and wait for squares to start filling. When the first batch of squares appears wait 2 secs and hit the clock to reset values and time. Your CPU will finish in about 38~40sec from start. Without doing anything else wait until the HW clock reads 33~34sec and while HW window is the active one of all, take the shot with Ctrl+PrtScr. Paste it into Paint and save...
This way you will capture only the (during) workload values and nothing else.
You can do exactly the same with stock settings and the #1/2/3 I suggested for direct comparison of core voltages, clocks, effective clocks, temps, and PBO limits. Only this way you will understand better how your CPU behaves under different PBO settings and it will answer (partially) your question about how EDC reduction works. R20 scores can be very inconsistent and its not easy to draw conclusions from that alone.

About your question...
Silicon FITness controller constantly monitoring the CPU parameters and adjusting boost algorithm, of course in conjunction with temp, BUT... its job also is to keep certain factors tamed like current (EDC) and power (PPT). Higher temp result to high current which "kills" high clock and voltage. High current is the most stressfull condition for the silicon that is keeping it from auto clock/voltage higher. Your temps are maybe the best I've seen so far with so high clocks and with these levels of power draw and current. Your water block and the entire loop is working well I assume. What TIM are you using?

I cant really tell you how this works, cause I lack the technical definitions and terminology of these matters but out of testing of my own EDC reduction has made headroom for clock and voltage.
This video is very informative about current

...and see for your self

Stock PBO, regular TIM (red boxed points of interest)




Stock PBO, Liquid metal




Stock PBO for limits, PBO scalar X2, Liquid metal




EDC capped, PPT +7, PBO scalar X2, Liquid metal



EDC capped, PPT +7, PBO scalar X3, Liquid metal



-----------------
If you just use PBO scalar (X2/3) without cap EDC but instead released as PPT, you will only raise current and eventually temp which will result in lowering clock.

 

[eidairaman1]

@Optimus Water Cooling ussend @ShrimpBrime an AMD block for testing

 

[PolRoger]

About your question...
Silicon FITness controller constantly monitoring the CPU parameters and adjusting boost algorithm, of course in conjunction with temp, BUT... its job also is to keep certain factors tamed like current (EDC) and power (PPT). Higher temp result to high current which "kills" high clock and voltage. High current is the most stressful condition for the silicon that is keeping it from auto clock/voltage higher. Your temps are maybe the best I've seen so far with so high clocks and with these levels of power draw and current. Your water block and the entire loop is working well I assume. What TIM are you using?

I cant really tell you how this works, cause I lack the technical definitions and terminology of these matters but out of testing of my own EDC reduction has made headroom for clock and voltage.

A lot to think about as well as explore with some further PBO parameter testing. For running with longer term continuous full core loads (WCG)... I prefer using a static per/CCX overclock with a lower fixed vcore voltage. I tend to achieve better load temps @ ~4100/4150MHz vs. having PBO and the Silicon FITness controller parameters settle clock speeds down to ~4000/4100(+)MHz. Of course no additional core boosting with that method.

I'm using the previous version of Artic MX-4 not the newer revised 2019 edition.

I ran another CB R20 with further changes to PBO settings (#3) and will post a screen shot to Lorry's "Trying to understanding Ryzen 3000 boost speed variations" thread. We seem to be getting off-topic from the original AMD Foundation block heading.

 

[lorry]

I have no problems with that @PolRoger either way, as it is all inter-linked in my way of thinking, but I know that others may not think so.
This is All new to me so Any learning for me is good, but i can see why others may want to keep topics more 'streamlined'

 

[lorry]

An interesting report here

|

level1techs.com

Arrived

http://imgur.com/gnGsVNa

http://imgur.com/kSuGPXl

With the Noctua NH DI-15S I applied the Kryonaut as they suggested, covering the die and it does pretty good as far as I can tell, so,

Do the same with the block or 1 dot, or 3 as level one is now suggesting @Optimus Water Cooling ?

 

[Optimus Water Cooling]

Awesome!

For applications, we recommend going as thin as possible with the paste. The easiest way to do that is using the spatula spread method. It's really hard to say what kind of performance changes you'll see based on your current method. The multi-dot methods seem...suspicious, at least for liquid cooling. Because those air coolers are not at all at the same level of quality or accuracy as our blocks. There are many other factors involved, including a big mechanical difference between heat pipe cold plate and a microfin ultra thin cold plate.

But if you do some testing, let us know how it goes

 

[lorry]

Awesome!

For applications, we recommend going as thin as possible with the paste. The easiest way to do that is using the spatula spread method. It's really hard to say what kind of performance changes you'll see based on your current method. The multi-dot methods seem...suspicious, at least for liquid cooling. Because those air coolers are not at all at the same level of quality or accuracy as our blocks. There are many other factors involved, including a big mechanical difference between heat pipe cold plate and a microfin ultra thin cold plate.

But if you do some testing, let us know how it goes

I actually used the cover the entire heatshield method using a spatula, as Noctua suggests.
I was wondering though about what various folk (bearded hardware etc) have said about the AMD heatshield, that being that they really need lapping, as it sinks in from the corners

 

[Optimus Water Cooling]

We have ways to compensate for the AMD IHS. And our block on the stock IHS is better than our block on a lapped IHS.

In the future (AM5?) AMD should make some improvements to their IHS design and socket mount. Fingers crossed.

 

[lorry]

We have ways to compensate for the AMD IHS. And our block on the stock IHS is better than our block on a lapped IHS.

In the future (AM5?) AMD should make some improvements to their IHS design and socket mount. Fingers crossed.

Eh? How does that fit in with your 'worlds flattest cold plate' though? If the AMD IHS is concave and your coldplate is flat then surely there is less contact?
Or am I missing something? Explain please if you will, as I'm a bit lost, thanks

 

[Optimus Water Cooling]

Yes, so the cold plate is the world's flattest and smoothest when it's machined. So the surface smoothness is measured in microinches, which is super super small.

Then, the final block assembly adds a bow to the cold plate with pressure to make it match the IHS. Without the IHS bow, the contact wouldn't be ideal.

So really the idea of a super smooth cold plate is about achieving that perfect mirror finish on a raw copper cold plate, as opposed to cold plates with machine marks or ones that aren't perfectly smooth. Better contact = better thermal transfer.

 

[lorry]

I will be honest, I at first thought that was BS, so I checked.
I placed it onto a sheet of glass, if I lightly press on one edge of the top it will lift on the opposite edge
You can the bow here -

http://imgur.com/ti3RKzE

But tell me, it seems that the bow looks to be greater across the shorter sides of the bracket than the longer sides. How come please?

That point should be in your advertising, otherwise some might lap their IHS thinking that they are doing the right thing

 

[Optimus Water Cooling]

The bow is defined by the center jet slot area. Because the die areas on CPUs aren't uniform square, they're all a rectangle shape, though they have a different shape depending on the cpu and generation. The rectangular bow on our blocks helps match the shape of the IHS bows. Nothing is exact, though, until Intel/AMD decide to release bare die cpus

 

[lorry]

The bow is defined by the center jet slot area. Because the die areas on CPUs aren't uniform square, they're all a rectangle shape, though they have a different shape depending on the cpu and generation. The rectangular bow on our blocks helps match the shape of the IHS bows. Nothing is exact, though, until Intel/AMD decide to release bare die cpus

Heh, fair point. Thought I was seeing things when I first realised that the bow wasn't equal.
Still feel that should be included though in your advertising on the page, as I don't recall any other block having that feature?