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NVIDIA RSX-65nm

Heat Spreader
Heat Spreader
RSX-CXD2991
RSX-CXD2991
Block Diagram
Block Diagram
NVIDIA's RSX-65nm GPU uses the Curie architecture and is made using a 65 nm production process at Sony. With a die size of 186 mm² and a transistor count of 300 million it is a small chip. RSX-65nm does not support DirectX. Modern GPU compute technologies are not available. It features 24 pixel shaders and 8 vertex shaders, 24 texture mapping units and 8 ROPs. Due to the lack of unified shaders you will not be able to run recent games at all (which require unified shader/DX10+ support).

Graphics Processor

Released
Aug 2008
GPU Name
RSX-65nm
Architecture
Curie
Foundry
Sony
Process Size
65 nm
Transistors
300 million
Density
1.6M / mm²
Die Size
186 mm²

Graphics Features

DirectX
N/A
OpenGL
ES 1.1
OpenCL
N/A
Vulkan
N/A
Pixel Shader
3.0
Vertex Shader
3.0

Render Config

Pixel Shaders
24
Vertex Shaders
8
TMUs
24
ROPs
8
Max. TDP
58 W
Tex L1 Cache
16 KB per 4 PS
Tex L2 Cache
80 KB per 4 PS

All Curie GPUs

NVIDIA GPU Architecture History

Graphics cards using the NVIDIA RSX-65nm GPU

Name Chip Memory Shaders TMUs ROPs GPU Clock Memory Clock
NVIDIA Playstation 3 GPU 65nm
RSX-CXD2991 256 MB 24 / 8 24 8 550 MHz 650 MHz

RSX-65nm GPU Notes

Multi-way programmable parallel floating-point shader pipelines
Independent pixel/vertex shader architecture

24 parallel pixel-shader ALU pipes clocked @ 550 MHz
5 ALU operations per pipeline, per cycle
- 2 vector4
- 2 scalar/dual/co-issue and fog ALU
- 1 Texture ALU
16 floating-point operations per pipeline, per cycle

Pixel Floating Point Operations:
211.2 GFLOPS
(550MHz x 24 Shaders x 16 ops per clock per cycle)

8 parallel vertex pipelines @ 500 MHz
2 ALU operations per pipeline, per cycle
- 1 vector4
- 1 scalar, dual issue
10 floating-point operations per pipeline, per cycle

Vertex Floating Point Operations:
40.0 GFLOPS
(500MHz x 8 Shaders x 10 ops per clock per cycle)

Total Floating Point Operations:
251.2 GFLOPS
(550MHz x 24 Shaders x 16 ops per clock per cycle)
+(500MHz x 8 Shaders x 10 ops per clock per cycle)

74.0 billion shader operations/s
(24 Pixel Shader Pipelines x 5 ALUs x 550 MHz)
+(8 Vertex Shader Pipelines x 2 ALUs x 500 MHz)

24 texture filtering units (TF)
8 vertex texture addressing units (TA)
24 filtered samples per clock

Peak texel fillrate:
13.2 GTexel/s
(24 textures x 550 MHz)

32 unfiltered texture samples per clock
(8 TA x 4 texture samples)

8 Render Output units / pixel rendering pipelines

Peak pixel fillrate:
4.4 GPixel/s
(8 ROPs x 550 MHz)

Peak Z sample rate:
8.8 GSamples/s
(2 Z-samples x 8 ROPs x 550 MHz)

Peak Dot product operations:
56 billion/s (combined with Cell CPU)

128-bit pixel precision offers rendering of scenes with High dynamic range rendering (HDR)

Cell FlexIO bus interface
20 GB/s read to the Cell and XDR memory
15 GB/s write to the Cell and XDR memory

Support for PSGL (OpenGL ES 1.1 + Nvidia Cg)
Support for S3TC texture compression
Oct 18th, 2024 03:21 EDT change timezone

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