Intel has dropped plans to build Xe-HP server GPUs commercially. This line of products would have powered cloud-based graphics rendering instances, for cloud-gaming or cloud-rendering applications. An announcement to this effect came from Raja Koduri, overseeing the development and monetization of Xe. Koduri stated that Xe-HP based instances were originally set up to power Intel's oneAPI devcloud as a software development vehicle for oneAPI and the upcoming Aurora supercomputer of the Argonne National Laboratory.

The company will now focus on Xe as a compute accelerator in the form of Xe-HPC "Ponte Vecchio," and discrete graphics in the client segment, leveraging the Xe-HPG graphics architecture. The smallest derivatives, the Xe-LP, powers integrated graphics solutions found in the company's Core processors (11th Gen and later). Back in the August 2021 Architecture Day presentation, Intel's technical brief for Xe HPC revealed that the silicon itself features certain on-die hardware relevant to graphics rendering (more here). This would have gone on to power the Xe-HP server GPU solutions.

SiPearl, the designer of the high computing power and low consumption microprocessor that will be the heart of European supercomputers, has entered into a partnership with Intel in order to offer a common offer dedicated to the first exascale supercomputers in Europe. This partnership will offer their European customers the possibility of combining Rhea, the high computing power and low consumption microprocessor developed by SiPearl, with Intel's Ponte Vecchio accelerator, thus creating a high performance computing node that will promote the deployment of the exascale supercomputing in Europe.

To enable this powerful combination, SiPearl plans to use and optimize for its Rhea microprocessor the open and unified programming interface, oneAPI, created by Intel. Using this single solution across the entire heterogeneous compute node, consisting of Rhea and Ponte Vecchio, will increase developer productivity and application performance.

Intel in its 2021 Architecture Day presentation put out fine technical details of its Xe HPC Ponte Vecchio accelerator, including some [very] preliminary performance claims for its current A0-silicon-based prototype. The prototype operates at 1.37 GHz, but achieves out at least 45 TFLOPs of FP32 throughput. We calculated the clock speed based on simple math. Intel obtained the 45 TFLOPs number on a machine running a single Ponte Vecchio OAM (single MCM with two stacks), and a Xeon "Sapphire Rapids" CPU. 45 TFLOPs sees the processor already beat the advertised 19.5 TFLOPs of the NVIDIA "Ampere" A100 Tensor Core 40 GB processor. AMD isn't faring any better, with its production Instinct MI100 processor only offering 23.1 TFLOPs FP32.