Japan has proposed a $65 billion (or more) plan to strengthen the semiconductor and AI industries in the country through grants and financial support by fiscal year 2030. The government plans to present this proposal at the next parliamentary session. The draft includes support for mass production of next-generation chips, focusing on AI chipmakers such as Rapidus, the government estimates an economic impact of about 160 trillion yen from this investment. Rapidus plans to start mass production of advanced chips in Hokkaido from 2027 and will work with IBM and Belgian research organization Imec.

According to the report from Reuters, Prime Minister Shigeru Ishiba said the government would not issue deficit-financing bonds to fund the support plan, although specific financial details are not yet known. The new initiative builds on last year's 2 trillion yen investment in the chip industry, and it is part of a broader economic package. Expected to be approved by the Cabinet on November 22, the plan calls for combined public and private investment in the semiconductor industry of more than 50 trillion yen over the next decade.

MultiDimension Technology Co., Ltd. (MDT), a global leader in magnetic sensors specializing in Tunneling Magnetoresistance (TMR) technology, introduces its groundbreaking TMR2615/ TMR2617 series at Electronica and SPS. These cutting-edge TMR sensors are poised to revolutionize gaming experience with exceptional performance and innovative features.

Game-Changing Technology for Consumer Electronics
TMR2615/TMR2617 are powered by MDT's proprietary TMR technology, integrated with a programmable ASIC offering factory-preset tailored to user-defined parametric targets. This ensures high consistency and optimal performance across large-scale production, addressing diverse demands for thumbsticks and trigger keys in gaming controllers.

Intel has plans to expands its chip packaging and testing operations in Chengdu, China. The company will put $300 million into Intel Products (Chengdu), as stated in a WeChat post by Chengdu's Reform and Development Commission, and reported by TrendForce. Intel announced its Chengdu plant in August 2003 as a semiconductor chip packaging and testing facility in the Chengdu Hi-Tech West Zone. The first phase began in February 2004 with the construction of a chipset factory, which was completed and put into production by the end of 2005. The second phase commenced in August 2005 and was completed in October 2006. By 2007, the packaging and testing facility was fully operational, handling Intel's most advanced processors.

Since its launch in 2003, Intel's Chengdu plant has handled over half of the packaging and testing for Intel's laptop processors. Even with rising US-China tensions, China remains Intel's biggest market making up 27 percent of its total income last year. The announced expansion will increase the packaging and testing ability of server chips and will add a new "customer solutions center." This center aims to make the supply chain more effective, give more support to Chinese customers, and speed up response times. Intel's Chengdu site plays a key role in the company's global supply chain, benefiting from the area's "favorable" business climate, CEO Patrick Gelsinger said during his visit last year.

TrendForce's latest investigations reveal that the combined market share of the top five SSD module makers in the retail sector has surged from 59% in 2022 to 72% in 2023, reinforcing a trend of larger companies expanding their dominance. These major players are leveraging their scale to negotiate more favorable prices for NAND Flash, boosting their competitive edge and ensuring they have sufficient resources to stock up in preparation for market shifts.

TrendForce reports that shipments of branded SSDs in the retail market reached 180 million units in 2023, marking a YoY growth of 3.7%. Reflecting on the SSD market for that year, it appeared that many PCs purchased during the pandemic had entered their typical replacement cycle.

Global shipments of silicon wafers are projected to decline 2% in 2024 to 12,174 million square inches (MSI) with a strong rebound of 10% delayed until 2025 to reach 13,328 MSI as wafer demand continues to recover from the downcycle, SEMI reported today in its annual silicon shipment forecast.

Strong silicon wafer shipment growth is expected to continue through 2027 to meet increasing demand related to AI and advanced processing, driving improved fab utilization rate for global semiconductor production capacity. Moreover, new applications in advanced packaging and high-bandwidth memory (HBM) production, which require additional wafers, are contributing to the rising need for silicon wafers. Such applications include temporary or permanent carrier wafers, interposers, device separation into chiplets, and memory/logic array separation.

TrendForce's latest findings reveal that NAND Flash products have been impacted by weaker-than-expected seasonal demand in the second half of 2024, leading to a decline in wafer contract prices in Q3. This downward trend is projected to deepen, with prices expected to drop by more than 10% in Q4.

Enterprise SSDs are the only segment likely to see modest price growth—supported by stable order momentum—with contract prices forecast to rise by 0-5% in Q4. However, PC SSDs and UFS will see more cautious procurement strategies from buyers, as weaker-than-expected sales of end products drive buyers to adopt a conservative approach. As a result, TrendForce projects overall NAND Flash contract prices will decline by 3-8% in Q4.

TSMC announced that its revenue for September 2024 reached NT$251.87 billion (US$7.80 billion), representing a 39% increase compared to the same month last year. The cumulative revenue for the first three quarters of 2024 climbed to NT$2,025.85 billion (US$62.72 billion), showing a 32% year-over-year growth. The company's third-quarter revenue amounted to NT$759.7 billion (US$23.52 billion), exceeding TSMC's own guidance of NT$706.6 billion to NT$731.5 billion (US$22.4 billion to US$23.2 billion). TSMC will report full third-quarter earnings on Oct. 17.

A report from Data Center Dynamics quotes sources saying that, due to increasing demand from NVIDIA and others, TSMC has been forced to change its CoWoS capacity expansion plan several times. In response, TSMC is building two more fabs, named P4 and P5, in Kaohsiung, Taiwan, raising the company's total number of facilities in the region to five. Four months ago, the company announced that it would build a third 2 nm fab at Nanzih Technology Industrial Park in Kaohsiung. The company's P1 fab, which started in August 2022, is expected to begin mass production next year, while P2 and P3 are still in the construction phase. TSMC's CoWoS monthly capacity is expected to reach more than 40,000 wafers by the end of 2024, 65,000 wafers in 2025, and at least 80,000 wafers in 2026.

Samsung Electronics is speeding up its work on 2 nm production facilities, industry sources say. The company has started to install advanced equipment at its "S3" foundry line in Hwaseong to set up a 2 nm production line. This line aims to produce 7,000 wafers each month by the first quarter of next year. Also, Samsung plans to create a 1.4 nm production line at its "S5" foundry in Pyeongtaek Plant 2 by the second quarter of next year. This line has a goal to make 2,000 to 3,000 wafers each month. By the end of next year, Samsung will change all the remaining 3 nm production lines at "S3" to 2 nm.

As we reported earlier, Samsung has pushed back the start date for its Tyler, Texas foundry. The plant set to open by late 2024, won't install equipment until after 2026. Also, Samsung has changed its plans for the Pyeongtaek Fab 4 foundry line. Because of lower demand, it will now make DRAM instead, moreover, at Pyeongtaek Fab 3, which has a 4 nm line, Samsung has cut back production. These changes are part of Samsung's plan to make 2 nm chips next year and 1.4 nm chips by 2027. The company wants to catch up with its rival TSMC, right now, Samsung has 11.5% of the global foundry market in Q2, while TSMC leads with 62.3%. An industry expert stressed how crucial this is saying, "With the delay in 3 nm Exynos production and other issues, getting the 2 nm process right could make or break Samsung Foundry". The struggle for Samsung is real, with the company's top management, led by DS Division Vice Chairman Jeon Young-hyun, having recently issued a public apology for the division's underwhelming performance.

TSMC and Samsung are reportedly in talks with the United Arab Emirates (UAE) to establish chip factories in the Gulf nation. As reported by the Wall Street Journal, this "desert dream" aligns with the UAE's ambitious plans to diversify its economy beyond oil and become a key player in the AI sector by building chips for AI domestically. The UAE and neighboring Saudi Arabia plan to leverage their oil wealth to invest in cutting-edge manufacturing, with AI emerging as a primary focus due to its high computational demands. Successful implementation of chip factories could significantly boost the region's AI capabilities and impact the global semiconductor supply chain. However, the project faces substantial challenges. Previous attempts to establish semiconductor manufacturing in the Gulf, such as the GlobalFoundries initiative over a decade ago, have yet to progress beyond initial planning.

The current proposal faces even greater obstacles, with estimated costs exceeding $100 billion for a state-of-the-art facility and necessary infrastructure. Geopolitical concerns add another layer of complexity. Recent US export restrictions of certain chips to the Gulf region may complicate the transfer of advanced manufacturing processes to the UAE. Despite these hurdles, the potential benefits are significant. For the UAE, success would represent a major step towards economic diversification and technological leadership. TSMC and Samsung could gain a strategic presence in a region eager for technological advancement. TSMC noted that the company focuses on current expansion projects in the US, Japan, and Germany, while Samsung declined to comment.

The Biden-Harris Administration announced today that Intel Corporation has been awarded up to $3 billion in direct funding under the CHIPS and Science Act for the Secure Enclave program. The program is designed to expand the trusted manufacturing of leading-edge semiconductors for the U.S. government.

The Secure Enclave program builds on previous projects between Intel and the Department of Defense (DoD) such as Rapid Assured Microelectronics Prototypes - Commercial (RAMP-C) and State-of-the-Art Heterogeneous Integration Prototype (SHIP). As the only American company that both designs and manufactures leading-edge logic chips, Intel will help secure the domestic chip supply chain and collaborate with the DoD to help enhance the resilience of U.S. technological systems by advancing secure, cutting-edge solutions.

Samsung's foundry plans have again hit a major setback. The company notified staff at its Taylor, Texas facility that it was temporarily removing workers from the site because it is still experiencing challenges with 2 nm semiconductor yields, delaying mass production timelines from late 2024 to 2026. The Taylor site had been anticipated as the flagship facility for Samsung's sub-4 nm production, allowing access to potential customers near the facility. While Samsung has moved rapidly in terms of process development, its yields for advanced nodes have outstripped them, the company's yields for sub-3 nm processes hover around 50%, with Gate-All-Around (GAA) technology witnessing yields of only 10-20%, significantly lower than neighboring competitor TSMC's 60-70% for corresponding nodes.

The yield gaps that the company is experiencing have exacerbated the gap in market share, with TSMC capturing 62.3% of the global foundry market share in Q2 versus Samsung's 11.5%. The company is struggling to gain share despite efforts by Chairman Lee Jae-yong - including visits to component suppliers ASML, and Zeiss - and these yields put at risk as much as 9 trillion won in U.S. CHIP Act potential subsidies that are dependent upon operational milestones.

Samsung Electronics, the world leader in advanced memory technology, today announced it has begun mass production of its one-terabit (Tb) quad-level cell (QLC) 9th-generation vertical NAND (V-NAND).

With the industry's first mass production of QLC 9th-generation V-NAND, following the industry's first triple-level cell (TLC) 9th-generation V-NAND production in April this year, Samsung is solidifying its leadership in the high-capacity, high-performance NAND flash market.

During its Q2 2024 earnings call, NVIDIA confirmed that its upcoming Blackwell-based products are facing low-yield challenges. However, the company announced that it has implemented design changes to improve the production yields of its B100 and B200 processors. Despite these setbacks, NVIDIA remains optimistic about its production timeline. The tech giant plans to commence the production ramp of Blackwell GPUs in Q4 2024, with expected shipments worth several billion dollars by the end of the year. In an official statement, NVIDIA explained, "We executed a change to the Blackwell GPU mask to improve production yield." The company also reaffirmed that it had successfully sampled Blackwell GPUs with customers in the second quarter.

However, NVIDIA acknowledged that meeting demand required producing "low-yielding Blackwell material," which impacted its gross margins. During an earnings call, NVIDIA's CEO Jensen Huang assured investors that the supply of B100 and B200 GPUs will be there. He expressed confidence in the company's ability to mass-produce these chips starting in the fourth quarter. The Blackwell B100 and B200 GPUs use TSMC's CoWoS-L packaging technology and a complex design, which prompted rumors about the company facing yield issues with its designs. Reports suggest that initial challenges arose from mismatched thermal expansion coefficients among various components, leading to warping and system failures. However, now the company claims that the fix that solved these problems was a new GPU photomask, which bumped yields back to normal levels.

Samsung Electronics is set to make a significant leap in semiconductor manufacturing technology with the introduction of its first High-NA 0.55 EUV lithography tool. The company plans to install the ASML Twinscan EXE:5000 system at its Hwaseong campus between Q4 2024 and Q1 2025, marking a crucial step in developing next-generation process technologies for logic and DRAM production. This move positions Samsung about a year behind Intel but ahead of rivals TSMC and SK Hynix in adopting High-NA EUV technology. The system is expected to be operational by mid-2025, primarily for research and development purposes. Samsung is not just focusing on the lithography equipment itself but is building a comprehensive ecosystem around High-NA EUV technology.

The company is collaborating with several key partners like Lasertec (developing inspection equipment for High-NA photomasks), JSR (working on advanced photoresists), Tokyo Electron (enhancing etching machines), and Synopsys (shifting to curvilinear patterns on photomasks for improved circuit precision). The High-NA EUV technology promises significant advancements in chip manufacturing. With an 8 nm resolution capability, it could make transistors about 1.7 times smaller and increase transistor density by nearly three times compared to current Low-NA EUV systems. However, the transition to High-NA EUV comes with challenges. The tools are more expensive, costing up to $380 million each, and have a smaller imaging field. Their larger size also requires chipmakers to reconsider fab layouts. Despite these hurdles, Samsung aims for commercial implementation of High-NA EUV by 2027.

Lexar, a leading global brand of flash memory solutions, is excited to announce their Kickstarter program for the upcoming Professional Go Portable SSD with Hub. Offering the ultimate setup to shoot seamless video from a mobile phone, the innovative Lexar Professional Go Portable SSD with Hub is a revolutionary solution that lets creators use the SSD on its own for unmatched freedom and portability or with the hub to add peripherals like lighting, microphones, power banks, and more. Weighing a mere 13 grams but packing a capacity of 1 TB-2 TB, the powerful SSD delivers USB 3.2 Gen 2 performance of 1050 MB/s read, 1000 MB/s write to shoot seamless Apple ProRes 4K 60 FPS video from an iPhone 15 Pro/Max or above and perform post-production processes right on the drive.

The Kickstarter campaign, which is already underway, gives consumers a chance to not only be first in line to receive the product when it launches, but seeks to engage with them for input, feedback, and an overall better understanding of what customers' needs and pain points are. The campaign currently has more than 2,375 backers with 20 days left.

Despite recent rumors speculating on NVIDIA's supposed cancellation of the B100 in favor of the B200A, TrendForce reports that NVIDIA is still on track to launch both the B100 and B200 in the 2H24 as it aims to target CSP customers. Additionally, a scaled-down B200A is planned for other enterprise clients, focusing on edge AI applications.

TrendForce reports that NVIDIA will prioritize the B100 and B200 for CSP customers with higher demand due to the tight production capacity of CoWoS-L. Shipments are expected to commence after 3Q24. In light of yield and mass production challenges with CoWoS-L, NVIDIA is also planning the B200A for other enterprise clients, utilizing CoWoS-S packaging technology.

Samsung Electronics, the world leader in advanced memory technology, today announced it has begun mass production for the industry's thinnest 12 nanometer (nm)-class, 12-gigabyte (GB) and 16 GB LPDDR5X DRAM packages, solidifying its leadership in the low-power DRAM market. Leveraging its extensive expertise in chip packaging, Samsung is able to deliver ultra-slim LPDDR5X DRAM packages that can create additional space within mobile devices, facilitating better airflow. This supports easier thermal control, a factor that is becoming increasingly critical especially for high-performance applications with advanced features such as on-device AI.

"Samsung's LPDDR5X DRAM sets a new standard for high-performance on-device AI solutions, offering not only superior LPDDR performance but also advanced thermal management in an ultra-compact package," said YongCheol Bae, Executive Vice President of Memory Product Planning at Samsung Electronics. "We are committed to continuous innovation through close collaboration with our customers, delivering solutions that meet the future needs of the low-power DRAM market."

NVIDIA may face delays in releasing its newest artificial intelligence chips due to design issues, according to anonymous sources involved in chip and server hardware production cited by The Information. The delay could extend to three months or more, potentially affecting major customers such as Meta, Google, and Microsoft. An unnamed Microsoft employee and another source claim that NVIDIA has already informed Microsoft about delays affecting the most advanced models in the Blackwell AI chip series. As a result, significant shipments are not expected until the first quarter of 2025.

When approached for comment, an NVIDIA spokesperson did not address communications with customers regarding the delay but stated that "production is on track to ramp" later this year. The Information reports that Microsoft, Google, Amazon Web Services, and Meta declined to comment on the matter, while Taiwan Semiconductor Manufacturing Company (TSMC) did not respond to inquiries.

Renesas Electronics Corporation, a supplier of advanced semiconductor solutions, and Altium Limited ("Altium"), a global leader in electronics design systems, today announced the successful completion of the acquisition of Altium by Renesas. The definitive agreement to acquire Altium was announced on February 15, 2024.

The combination sets the foundation for Renesas and Altium to create an innovative electronics system design and lifecycle management platform. The platform will deliver integration and standardization of various electronic design data and functions and enhanced component lifecycle management, while enabling seamless digital iteration of design processes to increase overall productivity. This brings significantly faster innovation and lowers barriers to entry for system designers by reducing development resources and inefficiencies.

After many back and forths, it now appears that TSMC is finally getting ready to start construction of its fab in Dresden, Germany. Multiple news outlets are reporting that TSMC is getting ready to start production on its new fab within the next few weeks, which is ahead of the expected Q4 groundbreaking. That said, TSMC has yet to announce an official date for a groundbreaking ceremony or a date when construction will start, but according to media reports TSMC's Chairman and CEO C.C. Wei will be in Germany at the end of August to sign documents with the German government and during this trip, the groundbreaking ceremony is expected to take place.

Assuming everything goes according to plan, the Dresden fab is expected to start production sometime in late 2027, but it's far from a cutting edge fab, as it'll mainly be supplying the European automotive industry with components. The new fab should start its life with two different process technologies, namely a 28 or 22 nm planar CMOS node as well as a 16 or 12 nm FinFET node. The Dresden fab is said to have a production capacity of around 40,000 12-inch wafers monthly. The new fab is expected to be an investment in excess of €10 billion for TSMC, with the city of Dresden spending an additional €250 million for a special water supply system and enhancements to the power grid. Unlike similar projects, TSMC will not be the sole owner of the new fab, as Infineon, Robert Bosch and NXP are each taking a 10 percent stake in the fab.

The market for artificial intelligence (AI) platforms software grew at a rapid pace in 2023 and is projected to maintain its remarkable momentum, driven by the increasing adoption of AI across many industries. A new International Data Corporation (IDC) forecast shows that worldwide revenue for AI platforms software will grow to $153.0 billion in 2028 with a compound annual growth rate (CAGR) of 40.6% over the 2023-2028 forecast period.

"The AI platforms market shows no signs of slowing down. Rapid innovations in generative AI is changing how companies think about their products, how they develop and deploy AI applications, and how they leverage technology themselves for reinventing their business models and competitive positioning," said Ritu Jyoti, group vice president and general manager of IDC's Artificial Intelligence, Automation, Data and Analytics research. "IDC expects this upward trajectory will continue to accelerate with the emergence of unified platforms for predictive and generative AI that supports interoperating APIs, ecosystem extensibility, and responsible AI adoption at scale."

TrendForce's latest report on the memory industry reveals that DRAM and NAND Flash revenues are expected to see significant increases of 75% and 77%, respectively, in 2024, driven by increased bit demand, an improved supply-demand structure, and the rise of high-value products like HBM.

Furthermore, industry revenues are projected to continue growing in 2025, with DRAM expected to increase by 51% and NAND Flash by 29%, reaching record highs. This growth is anticipated to revive capital expenditures and boost demand for upstream raw materials, although it will also increase cost pressure for memory buyers.

An Innovate UK project worth £1.1M has been awarded to the Lancaster University spinout firm Quinas, the global semiconductor company IQE and Lancaster and Cardiff Universities. Quinas will coordinate the ambitious project which is the first step towards volume production of the universal computer memory ULTRARAM invented by Lancaster Physics Professor Manus Hayne.

ULTRARAM has extraordinary properties, combining the non-volatility of a data storage memory, like flash, with the speed, energy-efficiency, and endurance of a working memory, like DRAM. Most of the funding for the one-year project will be spent at IQE which will scale up the manufacture of compound semiconductor layers from Lancaster University to an industrial process at the Cardiff based firm. This will involve IQE developing advanced capability for growth of the compound semiconductors gallium antimonide and aluminium antimonide for the first time. The project follows significant investment to boost the UK semiconductor industry and the establishment of the world's first compound semiconductor cluster in South Wales.

As memory prices and volumes increase, manufacturers Nanya and Winbond have ceased the production cuts they implemented last year, with production now back to normal levels. Market research agencies and supply chain analysts indicate that memory shipments are expected to continue recovering in Q3 2024. Currently, memory factories are operating at a capacity utilization rate of 90% to full capacity, which is significantly higher than the 60% to 70% capacity utilization rate of wafer foundries with mature processes. Last year, Nanya adjusted its production volume reducing it by up to 20%. This year, production has gradually increased, reaching 70% to over 80% in the second quarter, and has now resumed normal levels.

Nanya anticipates that DRAM market conditions and prices will improve quarter by quarter, with the overall industry trending positively, potentially turning losses into profits in the third quarter. Nanya announced yesterday that its consolidated revenue for June was 3.363 billion yuan, marking a monthly increase of 0.35% and an annual increase of 36.83%, setting a high for the year. The cumulative consolidated revenue for the first half of the year was 19.424 billion yuan, a 44.4% increase compared to the same period last year. Nanya will hold a press conference on July 10 to announce its second-quarter financial results and operating outlook.

In 2016, TSMC developed and named its InFO FOWLP technology, and applied it to the A10 processor used in the iPhone 7. TrendForce points out that since then, OSAT providers have been striving to develop FOWLP and FOPLP technologies to offer more cost-effective packaging solutions.

Starting in the second quarter, chip companies like AMD have actively engaged with TSMC and OSAT providers to explore the use of FOPLP technology for chip packaging and helping drive industry interest in FOPLP. TrendForce observes that there are three main models for introducing FOPLP packaging technology: Firstly, OSAT providers transitioning from traditional methods of consumer IC packaging to FOPLP. Secondly, foundries and OSAT providers packaging AI GPUs that are transitioning 2.5D packaging from wafer level to panel level. Thirdly, panel makers who are packaging consumer ICs.