Wednesday, October 9th 2024

Samsung to Launch 2nm Production Line with 7,000-Wafer Monthly Output by Q1 2025

Samsung Electronics is speeding up its work on 2 nm production facilities, industry sources say. The company has started to install advanced equipment at its "S3" foundry line in Hwaseong to set up a 2 nm production line. This line aims to produce 7,000 wafers each month by the first quarter of next year. Also, Samsung plans to create a 1.4 nm production line at its "S5" foundry in Pyeongtaek Plant 2 by the second quarter of next year. This line has a goal to make 2,000 to 3,000 wafers each month. By the end of next year, Samsung will change all the remaining 3 nm production lines at "S3" to 2 nm.

As we reported earlier, Samsung has pushed back the start date for its Tyler, Texas foundry. The plant set to open by late 2024, won't install equipment until after 2026. Also, Samsung has changed its plans for the Pyeongtaek Fab 4 foundry line. Because of lower demand, it will now make DRAM instead, moreover, at Pyeongtaek Fab 3, which has a 4 nm line, Samsung has cut back production. These changes are part of Samsung's plan to make 2 nm chips next year and 1.4 nm chips by 2027. The company wants to catch up with its rival TSMC, right now, Samsung has 11.5% of the global foundry market in Q2, while TSMC leads with 62.3%. An industry expert stressed how crucial this is saying, "With the delay in 3 nm Exynos production and other issues, getting the 2 nm process right could make or break Samsung Foundry". The struggle for Samsung is real, with the company's top management, led by DS Division Vice Chairman Jeon Young-hyun, having recently issued a public apology for the division's underwhelming performance.
Source: IJiWei
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17 Comments on Samsung to Launch 2nm Production Line with 7,000-Wafer Monthly Output by Q1 2025

#2
Nomad76
News Editor
Davenwww.trendforce.com/news/2024/06/24/news-samsungs-3nm-yield-reportedly-below-20-struggling-for-mass-production/

www.theverge.com/2024/10/8/24265018/samsung-profit-apology-ai-memory-chips

Wait, what?
Planning is not forbidden; it could and more likely will be pushed forward. However, you have to tell investors that you're planning (at least).
Yes, the 3nm yield was/is poor, as we covered here www.techpowerup.com/327260/samsung-considers-foundry-division-spin-off-as-poor-3-nm-yields-deter-customers
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#3
Antique4106
Ambitious.. of course, competition is always healthy, for progress and the consumer.
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#5
Minus Infinity
cough BS cough.

They are called Scamsung for good reason.
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#6
watzupken
I don't know how it will help when Samsung's foundry have been experiencing the same yield issues for many years. I recall they have never gotten themselves out of this issue since their 7nm. There's always yield issues and the node always falls being TSMC when it comes to efficiency. The most apparent comparison is when Qualcomm switched their 8 Gen 1 from Samsung to TSMC (8 Gen 1+) and the difference is very noticeable. I feel the likes of Intel and Samsung should focus on identifying what went wrong and take time to address them before charging all out again with some minor tweaks and lofty goals.
AusWolfExactly my thoughts. They're struggling with 3 nm, but now they're on the track with 2 nm? Interesting.
Technically, Samsung did deliver 3nm. But we all know the yield is poor, and very little companies want to waste time paying for high rate of defective chips. So I am not surprise they will be on track for 2nm, just that if you don't solve the underlying problem, the result is still going to be the same if not worst.
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#8
Launcestonian
Never had problem with anything Samsung made & I have several devices here by them fully working after yrs of usage. Don't know why others have bad luck.
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#9
Neo_Morpheus
AusWolfExactly my thoughts. They're struggling with 3 nm, but now they're on the track with 2 nm? Interesting.
I have seen similar situations where the so called next gen ends up progressing faster/better than the previous one.

One sample would be the Atari Panther and the Jaguar. The Jaguar was more advanced, yet its development progressed faster than the Panther.

I know, completely different situations, but still, who knows if they are experiencing something similar.
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#10
Bwaze
Reminds me of GlobalFoundries' plans and projections, right before they had to admit they can't keep with the newest lithographies and focussed on making older, easier to make processes.
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#11
N/A
Added one more nanosheet for drive current and interconnect improvements.
AusWolfExactly my thoughts. They're struggling with 3 nm, but now they're on the track with 2 nm? Interesting.
And Intel is on track with 18A and struggling with 20. go figure.
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#12
kondamin
AusWolfExactly my thoughts. They're struggling with 3 nm, but now they're on the track with 2 nm? Interesting.
Other machines other constraints.
tsmc had to ease back on 3nm too
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#13
londiste
watzupkenI don't know how it will help when Samsung's foundry have been experiencing the same yield issues for many years. I recall they have never gotten themselves out of this issue since their 7nm. There's always yield issues and the node always falls being TSMC when it comes to efficiency.
Yield issues are reported when they are news. Samsung needs to generate publicity when they are developing new processes and they need to do it early to even remote complete with TSMC. Very early in the process development means yield issues. In most cases the yield issues are solved down the line and the process becomes OK at least in terms of yield but that part does not make the news.
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#14
Prima.Vera
Nomad76The struggle for Samsung is real, with the company's top management, led by DS Division Vice Chairman Jeon Young-hyun, having recently issued a public apology for the division's underwhelming performance.
That's because TSMC is faking the node shrink data with blatant marketing lies. 2nm is basically same as 4nm from Intel or Samsung, but hey, just change to a lower name and call it a shrink node.
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#15
Bwaze
Prima.VeraThat's because TSMC is faking the node shrink data with blatant marketing lies. 2nm is basically same as 4nm from Intel or Samsung, but hey, just change to a lower name and call it a shrink node.
That's what all have been doing for decades, "node size" doesn't denote any feature size for a long time now - it described gate length (or transistor size) only until 1997, cell size (smallest feature) until 2012, and since then it's only a commercial name of the process - allegedly because they've gone in 3D, so it doesn't make sense to measure just linear sizes... True measurement whether any given node is really a step forward in miniaturisation is transistor density, but that info isn't commonly given.
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#16
Prima.Vera
So basically the team with the best marketing won?
Or is the Company with the highest wields percentage that won? Is still not clear why TSMC is so successful, but Samsung and Intel, are not.
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#17
RandallFlagg
Prima.VeraSo basically the team with the best marketing won?
Or is the Company with the highest wields percentage that won? Is still not clear why TSMC is so successful, but Samsung and Intel, are not.
Actually, not that hard to understand. For one, the marketing of TSMC is superb. They marketed '16nm' as a smaller node, yet it was really 20nm with FinFet. Intel had done a true node shrink from 22nm to 14nm, *and* added FinFet. This is why Intel 14nm was the bees knees for so long. Intel 14nm was basically the same as TSMC 10nm - back in 2014. TSMC did not have this competitive "10nm" node until 2017. Transistor density was 44M/mm2 vs TSMC 12nm at 33.8M/mm2. Intel 14nm was 30% more dense than TSMC 12nm, and TSMC 10nm had less than a 10% density advantage vs Intel 14nm.

To this day, I see people here all the time quoting 'N5' as being 5nm and N3 being 3nm. Intel had to adjust its naming convention ('Intel 7', 'Intel 3' etc) because of this mea coupla (lie) from TSMC, a lie that has effectively made itself reality.

But that isn't really why TSMC keeps winning. It has to do with libraries for chip designers. Intel and Samsung may have excellent process nodes, but TSMC has the libraries.

An analogy would be having a fantastic compute platform, better than anyone else, but your compiler sucks. So nobody wants to develop on your platform, therefore your platform dies of neglect.
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