Introduction

The Core i5-12600K "Alder Lake" is Intel's all-important performance-segment processor around the $290-mark, taking the fight to the AMD Ryzen 5 5600X and perhaps even Ryzen 7 5800X. Before Ryzen shook things up in the processor industry, Core i5 in the desktop segment consisted of 4-core/4-thread processors for the longest time, but has since seen its core-counts go up every two years in response to AMD's consistent generational performance gains. The 8th and 9th Gen Core i5 chips were 6-core/6-thread, while the 10th and 11th Gen ones were 6-core/12-thread, matching their Ryzen 5 counterparts. "Alder Lake" introduces the Hybrid core architecture to the desktop segment, where we see combinations of larger performance "P" cores alongside efficient "E" cores, with the Intel Thread Director middleware working at a low level with the operating system to ensure the right kind of workload for the two core types.



The Core i5-12600K we're reviewing today is technically a 10-core/16-thread processor featuring six performance cores that have HyperThreading enabled, and four efficiency cores that lack it—hence the asymmetric thread count. Intel claims that its "Golden Cove" performance cores offer a massive 28% IPC gain over the "Skylake" cores that powered five generations of Core processors; and an impressive 19% gain over the "Cypress Cove" cores powering the previous-gen "Rocket Lake." On paper, the "Gracemont" E-cores are quite something else, matching the "Skylake" cores in IPC at the right frequency for a fraction of the power. These also only take up a quarter of the die area of the larger P-cores.

The two core types operate at different clock-speed bands. The P-cores tick at 3.70 GHz base and 4.90 GHz boost, while the E-cores do 2.80 GHz base with 3.60 GHz boost. Each of the six P-cores has 1.25 MB of dedicated L2 cache, while the four E-cores share 2 MB of L2 cache. All ten cores share 20 MB of L3 cache. Intel has done away with the vague terminology of TDP with this generation and defined two power values relevant to the consumer. For the i5-12600K, 125 W is set as the processor Base Power Value, while the Maximum Turbo Power value is set at 150 W. The processor can be made to operate at Maximum Turbo Power indefinitely or swing between the two values across various power levels.

The 12th Gen Core "Alder Lake" processors introduce new-generation I/O, including PCI-Express Gen 5, although only for the x16 PEG slot. The CPU-attached M.2 NVMe slot is still Gen 4. The processors are also first to market with DDR5 memory support, but retain backwards compatibility with DDR4. Intel ensured that motherboard manufacturers have plenty of products with DDR4 slots, should you want to stick to your current memory. The chipset bus sees a doubling in bandwidth over the previous generation, and there is chipset-attached PCIe Gen 4 connectivity.


Intel paper-launched the 12th Gen Core processor family on October 27, allowing us to post everything about the processor except performance testing, so we did a more comprehensive Preview Article on the "Alder Lake" microarchitecture. "Alder Lake-S" is the first desktop processor silicon built by Intel on its Intel 7 silicon fabrication node, formerly known as 10 nm Enhanced SuperFin. This node offers comparable transistor-density and power characteristics as 7 nm-class nodes by TSMC. The die measures approximately 200 mm², although it is noticeably smaller than the 14 nm "Rocket Lake-S" die.


The monolithic silicon features 8 "Golden Cove" P and 8 "Gracemont" E-cores. The E-cores are spread across two 4-core "E-core Clusters." A bi-directional Ringbus and 30 MB of L3 cache connect the P-cores, and E-core clusters, with the Uncore (integrated northbridge) and iGPU. The chip features a dual-mode memory controller that supports 160-bit wide DDR5 (native support for DDR5-4800) or 128-bit wide DDR4 (native support for DDR4-3200). The Gen12 Xe LP iGPU is carried over almost unchanged from the "Rocket Lake-S" silicon, with a minor speed-bump. The PCI-Express root complex is fascinating. The silicon puts out 16 Gen 5 lanes (32 Gbps per lane), which are allocated to the PEG slot on the motherboard, and 12 Gen 4 lanes (16 Gbps per lane), of which four drive a CPU-attached M.2 NVMe slot and eight serve as a physical layer of the DMI 4.0 x8 chipset bus (128 Gbps per direction bandwidth).


The "Golden Cove" performance core (P-core) features numerical increments to the decode unit, micro-op queue, and micro-op cache. The out-of-order (OoO) engine sees similar increments with 6-wide allocation and 12-wide execution ports, compared to 5-wide allocation and 10-wide execution ports for Cypress Cove. The execution stage sees the addition of a fifth execution port and ALU, FMA with FP16 support, and an updated fast adder (FADD). Similar improvements are made to the cache and memory sub-system. These add toward the 28% IPC uplift for this core. The E-core, on the other hand, is designed to provide a massive performance uplift from the previous-generation "Tremont" low-power microarchitecture, mainly to give it certain ISA capabilities found in larger cores, such as AVX2. The front-end is upgraded with a double-size 64 KB L1 instruction cache, more powerful branch-prediction unit, and two sets of triple out-of-order decoders. The out-of-order engine features a wide 256-entry OoO window and 17 execution ports for more parallelism. The execution stage sees a near 33% increase in both scalar and vector execution stages, as well as double the load store.


Intel Thread Director is a vital component that ensures the operating system doesn't see "Alder Lake" as having the same kind of CPU cores, sending processing traffic uniformly to all cores. Instead, it gives the OS a degree of awareness of the Hybrid architecture and ensures certain kinds of tasks are allocated exclusively on P-cores and others on E-cores. It also senses the nature of the processing workload (whether it's running in the foreground or background) and decides which kind of cores to tie it to. The OS scheduler by itself moves traffic between cores to meet certain power/thermal objectives, but Thread Director ensures this movement doesn't break the core-type hierarchy. Windows 11 is the recommended version of Windows for Alder Lake, as it introduces the ability for software to inform the processor of the nature of its work, and the kind of cores it's comfortable getting processed by.


Intel pulled off some innovative ways to transfer heat between the silicon and cooling solution over the past couple of solutions, to eke out the best-possible thermals from the 14 nm node it was stuck with. These innovations continue with Alder Lake. The die and STIM are now thinner and the copper IHS thicker. Among the new overclocking capabilities are the ability to tweak even the E-cores, DDR5 memory, new XMP 3.0 profiles for DDR5 memory, synthetic BCLK that ensures a base-clock overclock doesn't break sensitive clock domains relying on it, and external clock generation, in addition to the processor's internal clock generator.


With the monolithic silicon gaining complexity, there are several new overclocking knobs and clock domains to maximize your overclock. The introduction of the E-core adds its own base-clock multiplier, called xE, which works separately from the core ratio of the P-cores, dubbed xP. The xG multiplier dictates iGPU frequency. xR dictates the frequency at which the Ringbus interconnect and L3 cache operate.

Intel Z690 Chipset

Intel is debuting its 12th Gen Core desktop processors in 2021 exclusively with only the unlocked "K" and "KF" variants, so it's only launching the companion Z690 chipset. The "locked" processor SKUs and value-ended chipsets are expected to join the product stack in 2022. The Z690 chipset is Intel's first client chipset with PCI-Express 4.0 downstream connectivity. It talks to the "Alder Lake-S" processor over the DMI 4.0 x8 chipset bus. Downstream PCIe connectivity includes 12x Gen 4 and 16x Gen 3 PCIe general-purpose lanes. The rest of its chipset-attached connectivity is the same as for Z590, including MIPI SoundWire support, NVMe RAID, 8-port SATA 6 Gbps, and the recommended network interfaces that include 2.5 GbE and Wi-Fi 6E.

Unboxing and Photography

Our Core i9-12900K and i5-12600K samples came to us in a special press-only package, which is a jewel case that has a plastic scale-up model of the Intel Alder Lake-S die.


The retail package is a simple paperboard box that's extremely spartan and doesn't even cost a dollar to make. No cooler is included.


Here it is, the processor itself. It measures 37.5 mm x 45.0 mm and is a more rectangular-looking processor, much like the LGA1366 before it.


Intel Socket LGA1700 has an intuitive installation process that should be familiar from many past LGA sockets. Trouble is that it has a different cooler mount-hole spacing than LGA1200 and five different Socket-H series sockets before it, so you'll need to search for a compatible cooler. Most cooler companies are handing out adapters, but these aren't available in all countries.

Test Setup

• All applications, games, and processors are tested with the drivers and hardware listed below—no performance results were recycled between test systems.
• All games and applications are tested using the same version.
• All games are set to their highest quality setting unless indicated otherwise.

Super Pi

SuperPi is one of the most popular benchmarks with overclockers and tweakers. It has been used in world-record competitions since forever. It is a purely single-threaded CPU test that calculates Pi to a large number of digits—32 million for our testing. Released in 1995, it only supports x86 floating-point instructions and thus makes for a good test for single-threaded legacy application performance.

wPrime

While SuperPi focuses on calculating Pi, wPrime tackles another mathematical problem: finding prime numbers. It uses Newton's Method for that. One of the design goals for wPrime was to engineer it so that it can make the best use of all cores and threads available on a processor.