Introduction

Intel today launched its 11th Generation Core "Rocket Lake" desktop processor family led by the Core i9-11900K—this is its long-awaited review. With the Core i9-11900K, Intel wants to respond to the AMD Ryzen 5000 series, which snatched overall performance leadership away from the company. Rocket Lake is Intel's first attempt at improving per-core (single-threaded) performance in several years, through the introduction of the new "Cypress Cove" CPU core. Intel claims IPC gain over the previous generation of up to 19%. The i9-11900K is an 8-core/16-thread processor, which is a step backward from its 10-core/20-thread predecessor, the i9-10900K, but Intel believes that the IPC gain and enhancements to the multi-core boosting algorithm should help recover some of the multi-threaded performance despite the two-core deficit. This is also their attempted hint at the market and software developers that eight cores should be plenty for cutting-edge gaming and client desktop tasks.



The reason Intel had to stop at eight cores for Rocket Lake has more to do with the fact that the processor is still manufactured on the 14 nm silicon fabrication node Intel has been lugging along for six years now. The Core i9-11900K is built on the same Socket LGA1200 package as its predecessor, and the package is physically of the same size as the i7-860 from 2009. The new Cypress Cove CPU cores are significantly larger than the "Skylake" cores on "Comet Lake," and the new Gen12 Xe LP iGPU is larger than the Gen 9.5 unit, too. As a result, elongating the die to cram in more cores wasn't an option. Add to this that the 14 nm node limits the power budget, and the 10-core Comet Lake was already flirting with 250 W package power draw. Physically removing the iGPU to make room for the extra two cores wasn't an option either, as Intel emphasizes the iGPU to sell these chips to the vast majority of desktop users that don't need discrete graphics. Intel plans to significantly change its mainstream desktop socket with the future generation "Alder Lake," however.

Why Intel stuck with 14 nm is another mystery. Intel's position is that to accomplish the performance target of Rocket Lake on the desktop platform, 14 nm was sufficient. Intel already has a more advanced silicon fabrication node, the 10 nm SuperFin, which it's using to make 11th Gen "Tiger Lake-U" mobile processors with plans to launch a new 8-core "Tiger Lake-H" mobile chip later this year. Mobile processors make up a major share of Intel's client CPU sales, and with the recent surge in notebook sales, the company wants to maximize its 10 nm foundry utilization for mobile chips. The desktop platform has a relatively "unlimited" power budget compared to mobile, and with 10th Gen "Comet Lake-S," Intel seems to have decided that it's willing to take the heat for selling a hot and inefficient desktop chip as long as it's competitive.

We'll go into the nuts and bolts of Rocket Lake on the following pages, but put briefly, the chip combines eight new Cypress Cove CPU cores with a Gen12 Xe LP integrated graphics core and an updated platform I/O that includes PCI-Express Gen 4. The chip also puts out eight more PCIe lanes than the previous generation. These contribute to a CPU-attached NVMe interface, much like those of AMD Ryzen chips, and a double-width DMI x8 chipset-bus. The general purpose PCIe connectivity put out by the new Intel 500-series chipsets continues to be PCIe Gen 3.

With this generation, Intel has an ace up its sleeve—DLBoost, or hardware acceleration of AI deep-learning neural net building and training. Intel claims DLBoost accelerates DNN training performance by up to six times compared to normal x86 execution. DLBoost made its debut with the company's 10th Gen "Ice Lake" mobile processors, and Intel sees huge potential for AI in several client-relevant media tasks, such as quick image and video manipulation—just like on the latest smartphones. The company also put out plenty of developer documentation and is working with ISVs to promote DLBoost. Another feature making its desktop debut is the new AVX-512 instruction set, or at least a truncated version of it, with only client-relevant instructions.

The Core i9-11900K 8-core processor is clocked at 3.50 GHz, with a maximum Turbo frequency of 5.30 GHz using Thermal Velocity Boost and an all-core boost frequency of 4.70 GHz. Each of the eight Cypress Cove cores comes with 512 KB of dedicated L2 cache, and the chip has 16 MB of shared L3 cache. The i9-11900K is unlocked and ready for overclocking. Intel has introduced several new features for overclockers, which we'll detail on the following pages. The i9-11900K is priced at US$539 in 1,000-unit tray quantities, which should put its retail starting price at around $550, the same pricing territory as AMD's 12-core Ryzen 9 5900X. In this review, we put the Core i9-11900K through an exhaustive new set of CPU and gaming tests to show you if Intel has managed to take back the crown from AMD.

Unboxing and Photography

Our Core i9-11900K and i5-11600K processors came to us in a special package meant for reviewers only. The retail box, pictured above, is made out of plastic and has a unique geometric shape.


The processor is based on the same Socket LGA1200 package as the 10th Gen Comet Lake and will work on not just Intel 500-series chipset motherboards, but also older 400-series ones with a BIOS update.


The retail Core i9-11900K does not include a cooler, but you're spoiled for choice as any Socket LGA1200 or LGA115x cooling solution should work. Just be sure it can handle a TDP of at least 125 W.

The Rocket Lake Microarchitecture

The new Rocket Lake microarchitecture forms the bedrock of Intel's 11th Gen Core desktop processor family. The architecture aims to introduce some of Intel's latest CPU and iGPU architectures to the desktop platform. It also brings Deep Learning Boost AI acceleration to this form factor, and AVX-512. With Rocket Lake, Intel aims to introduce their first double-digit single-threaded CPU performance gains in five years, and a massive iGPU performance gain over the previous generation.


The Rocket Lake-S die is built on what is hopefully the final refinement of Intel's 14 nm silicon fabrication process. Why Intel didn't go with 10 nm SuperFin is anyone's guess. The company still seems to be transitioning between 14 nm and 10 nm-class nodes and is currently prioritizing mobile and enterprise processors with the new node. The price Intel pays for sticking with 14 nm does not just consist of power/thermal costs rivaling the 10th Gen Comet Lake. CPU cores are also limited to a maximum of eight since the LGA1200 package has limited fiberglass substrate area.

Rocket Lake combines five key design enhancements over the previous generation. These are the new Cypress Cove CPU core, new Gen12 Xe LP integrated graphics, new Gaussian Network Accelerator (GNA) 2.0—a hardware component that enables the Deep Learning Boost (DLBoost) AI acceleration feature—AVX-512, and, lastly, the updated platform I/O that introduces PCI-Express 4.0, along with a chipset bus with double the width over the previous generation.

Cypress Cove

The new Cypress Cove CPU core is a back-port of the "Sunny Cove" core found in Ice Lake processors, to the 14 nm silicon fabrication node. Sunny Cove was originally designed for Intel's 10 nm node. Intel hasn't released core architecture documentation specific to Cypress Cove, but we can extrapolate from what precious little information Intel put out for Sunny Cove.


A CPU core has essentially three components—the front-end, a part that understands the nature of the work and allocates the right hardware resources to get it done; the Execution stage, where the actual number-crunching happens; and the Load/Store stage, which interfaces this work done/to-be-done with the memory system through the processor's cache hierarchy. Intel appears to have directed its engineering efforts toward improving the Execution and Load/Store stages.


There are numerical increases in key components that make up the Execution stage of the core: 25% more allocation width and execution ports, 33% more AGUs, and an additional Store unit in Load/Store. These changes enable support for newer instruction sets—prominently, 512-bit AVX (or AVX-512). Rocket Lake being a client microarchitecture, receives a truncated version of AVX-512 with only those instructions that are relevant to the client segment. The cache sub-system receives a much needed update with the L1 Data cache being enlarged to 48 KB (from 32 KB on Skylake) and the L2 cache being doubled in size to 512 KB. At 16 MB, the L3 cache size hasn't been changed from the previous-generation 8-core parts.

Intel Xe Graphics

The next major component is the Intel Iris Xe integrated graphics solution based on the latest Gen12 Xe LP graphics architecture. This is the same exact technology as in the Tiger Lake iGPUs, but with a slight difference. While the Tiger Lake iGPU gets 96 execution units as shown in the slide above, the Rocket Lake iGPU only has 48. This was probably done to conserve silicon real-estate on the 14 nm die. Intel attempted to make up for the deficit in EUs compared to Tiger Lake by running the iGPU at higher engine clocks and a more generous power budget than the 15-watt Tiger Lake chips launched so far. In any case, Intel claims that the iGPU on Rocket Lake performs up to 50% faster than the Gen9.5 solution found in Comet Lake. Intel updated the media engine of the iGPU to now offer hardware-acceleration of 10-bit AV1 and 12-bit HEVC video formats.

AVX-512

With this generation, Intel is introducing the new AVX-512 instruction set. This evolution of AVX and AVX2 helps accelerate SIMD workloads—similar operations on a lot of data at the same time. The whole AVX-512 instruction set is a vast set of instructions, not all of which are relevant to the client PC use case. Intel has hence truncated the instruction set, with only certain instructions available to client platforms such as Rocket Lake and Ice Lake, while enterprise/HPC products, such as Xeon Scalar processors and Xeon Phi, have different instructions. Since Cypress Cove is derived from Sunny Cove (and not "Willow Cove"), it features Foundational (F), Conflict-Detect (CD), Vector Propulsion Count (VPOPCNTDQ), Vector Length (VL), BFloat16, Vector-AES, etc., but not the Vector Intersect (VP2INTERSECT) instruction Willow Cove supports.

Gaussian Network Accelerator

Next up is GNA 2.0, the hardware component that enables DLBoost, Intel's ambitious new client processor feature that brings AI capabilities to the processor to speed up certain creativity apps that can leverage them. AI-accelerated video and image manipulation has made great strides on smartphones for the past 3+ years, and Intel sees an opportunity for it on the PC, too. DLBoost debuted in 2019 with the 10th Gen Ice Lake mobile processors, and is coming to desktop with Rocket Lake. Intel claims that it accelerates deep-learning neural net building/training by up to six times compared to native x86 machine code, which can help offload the CPU cores.