Multiple hardware versions found.
Performance could vary due to unannounced flash/controller changes.
Capacity: | 960 GB |
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Hardware Versions: | |
Overprovisioning: | 129.9 GB / 14.5 % |
Production: | Active |
Released: | Dec 2023 |
Price at Launch: | 62 USD |
Part Number: | Unknown |
Market: | Consumer |
Form Factor: | 2.5" |
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Interface: | SATA 6 Gbps |
Protocol: | AHCI |
Power Draw: |
0.33 W (Idle) Unknown (Avg) 2.1 W (Max) |
Manufacturer: | Phison |
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Name: | PS3111-S11-13 |
Architecture: | ARM 32-bit |
Core Count: | Single-Core |
Frequency: | 200 MHz |
Foundry: | UMC |
Process: | 40 nm |
Flash Channels: | 2 @ 533 MT/s |
Chip Enables: | 8 |
Manufacturer: | SpecTek |
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Name: | B17A |
Part Number: | PF644-37AS |
Rebranded: | FBNB17A4T1KTUAFM4-37AS |
Type: | TLC |
Technology: | 64-layer |
Speed: | 533 MT/s .. 667 MT/s |
Capacity: | 2 chips @ 4 Tbit |
ONFI: | 4.0 |
Topology: | Floating Gate |
Process: | 20 nm |
Die Size: | 108 mm² (4.7 Gbit/mm²) |
Dies per Chip: | 8 dies @ 512 Gbit |
Planes per Die: | 4 |
Decks per Die: | 2 |
Word Lines: |
74 per NAND String
86.5% Vertical Efficiency |
Read Time (tR): | 88 µs |
Program Time (tProg): | 880 µs |
Block Erase Time (tBERS): | 1500 ms |
Die Read Speed: | 727 MB/s |
Die Write Speed: | 69 MB/s |
Page Size: | 16 KB |
Block Size: | 2304 Pages |
Plane Size: | 504 Blocks |
Type: | None |
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Sequential Read: | 500 MB/s |
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Sequential Write: | 450 MB/s |
Random Read: | 55,000 IOPS |
Random Write: | 80,000 IOPS |
Endurance: | 500 TBW |
Warranty: | 5 Years |
MTBF: | 2.0 Million Hours |
Drive Writes Per Day (DWPD): | 0.3 |
SLC Write Cache: |
approx. 350 GB
(dynamic only) |
Cache Folding Speed: | 50 MB/s |
TRIM: | Yes |
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SMART: | Yes |
Power Loss Protection: | No |
Encryption: |
|
RGB Lighting: | No |
PS5 Compatible: | No |
|
Controller:In order to improve performance, Phison implemented a way that the controller utilizes it's internal 32 MiB of SRAM as some kind of "Pit-stop" that is allocated for incoming Write request in order to improve performance since it's a very quick to access and fast RAM. This implementation was called Smart Cache Flush. NAND Die:Usually lower endurance ratings than Micron's counterpart |