Tuesday, May 16th 2017

AMD to Continue Working With TSMC, GLOBALFOUNDRIES on 7 nm Ryzen

In the Q&A section of their 2017 Financial Analyst Day, AMD CEO Lisa Su answered an enquiry from a Deutsche-bank questioner regarding the company's aggressive 7 nm plan for their roadmap, on which AMD seems to be balancing its process shrinkage outlook for the foreseeable future. AMD will be developing their next Zen architecture revisions on 7 nm, alongside a push for 7 nm on their next-generation (or is that next-next generation?) Navi architecture. This means al of AMD's products, consumer, enterprise, and graphics, will be eventually built on this node. This is particularly interesting considering AMD's position with GLOBALFOUNDRIES, with which AMD has already had many amendments to their Wafer Supply Agreement, a remain of AMD's silicon production division spin-off, the latest of which runs from 2016 to 2020.

As it is, AMD has to pay GLOBALFOUNDRIES for its wafer orders that go to other silicon producers (in this case, TSMC), in a quarterly basis since the beginning of 2017, based on the volume of certain wafers purchased from another wafer foundry. In addition, AMD has annual wafer purchase targets from 2016 through the end of 2020, fixed wafer prices for 2016, and a framework for yearly wafer pricing in this amendment, so the company is still bleeding money to GLOBALFOUNDRIES. However, AMD is making the correct decision in this instance, I'd wager, considering GLOBALFOUNDRIES' known difficulties in delivering their process nodes absent of quirks.
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12 Comments on AMD to Continue Working With TSMC, GLOBALFOUNDRIES on 7 nm Ryzen

#1
TheoneandonlyMrK
Safe to assume sp3r and threadripper will see drop in cpu upgrades, out to 2020 possibly :) nice.
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#2
cdawall
where the hell are my stars
Oh yay let me get excited about another venture with GloFo. Maybe this time they will have acceptable yields [/sarcasm]
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#3
Brusfantomet
so GloFo insists on ALLCAPS for the name?
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#4
cdawall
where the hell are my stars
Brusfantometso GloFo insists on ALLCAPS for the name?
It's because they already know you are yelling their name. I mean have you ever said it happily?
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#5
Melvis
So these 7nm chips are slatered for 2020? or earlier?
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#6
Nuckles56
So read AMD is screwed for the next few years by GloFo never managing to deliver what AMD expects or wants
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#7
Prima.Vera
What would happen after reaching 2nm?? Replace Silicon with something else?
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#8
Nuckles56
Prima.VeraWhat would happen after reaching 2nm?? Replace Silicon with something else?
I thought that 5nm was the absolute limit for silicon and then after that it had to be something else
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#9
medi01
Nuckles56I thought that 5nm was the absolute limit for silicon and then after that it had to be something else
I haven't heard about any "absolute limits" to be honest.
5nm was mentioned in the context when quantum tunneling effects jump in (jeopardizing the costs) so it is often regarded as "end of the Moor's law" mark.
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#10
deu
Nuckles56I thought that 5nm was the absolute limit for silicon and then after that it had to be something else
I've read that 4 nm was possible (cant remember where) Pretty sure Intel was planning it.
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#11
TheoneandonlyMrK
Nuckles56I thought that 5nm was the absolute limit for silicon and then after that it had to be something else
They would have room to manoover past 5nm since few parts are going to be at the size they say it is in actuality.
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#12
Vulpesveritas
If I'm not mistaken, i heard that negative effects from quantum tunneling start happening sub-10nm, but don't become a serious issue till 4nm?

But yeah, kinda crazy to consider that we're maybe five years off from the physical limits to how small we can shrink silicon.
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