Monday, July 23rd 2018
Top Three Intel 9th Generation Core Parts Detailed
Intel is giving finishing touches to its 9th generation Core processor family, which will see the introduction of an 8-core part to the company's LGA115x mainstream desktop (MSDT) platform. The company is also making certain branding changes. The Core i9 brand, which is being introduced to MSDT, symbolizes 8-core/16-thread processors. The Core i7 brand is relegated to 8-core/8-thread (more cores but fewer threads than the current Core i7 parts). The Core i5 brand is unchanged at 6-core/6-thread. The three will be based on the new 14 nm+++ "Whiskey Lake" silicon, which is yet another "Skylake" refinement, and hence one can't expect per-core IPC improvements.
Leading the pack is the Core i9-9900K. This chip is endowed with 8 cores, and HyperThreading enabling 16 threads. It features the full 16 MB of shared L3 cache available on the silicon. It also has some stellar clock speeds - 3.60 GHz nominal, with 5.00 GHz maximum Turbo Boost. You get the 5.00 GHz across 1 to 2 cores, 4.80 GHz across 4 cores, 4.70 GHz across 6 to 8 cores. Interestingly, the TDP of this chip remains unchanged from its predecessor, at 95 W. Next up, is the Core i7-9700K. This chip apparently succeeds the i7-8700K. It has 8 cores, but lacks HyperThreading.
The Core i7-9700K is an 8-core/8-thread chip clocked at 3.60 GHz, but its Turbo Boost states are a touch lower than those of the i9-9900K. You get 4.90 GHz single-core boost, 4.80 GHz 2-core, 4.70 GHz 4-core, and 4.60 GHz across 6 to 8 cores. The L3 cache amount is reduced to the 1.5 MB per core scheme reminiscent of previous-generation Core i5 chips, as opposed to 2 MB per core of the i9-9900K. You only get 12 MB of shared L3 cache.
Lastly, there's the Core i5-9600K. There's far too little changed from the current 8th generation Core i5 parts. These are still 6-core/6-thread parts. The nominal clock is the highest of the lot, at 3.70 GHz. You get 4.60 GHz 1-core boost, 4.50 GHz 2-core boost, 4.40 GHz 4-core boost, and 4.30 GHz all-core. The L3 cache amount is still 9 MB.
The three chips are backwards-compatible with existing motherboards based on the 300-series chipset with BIOS updates. Intel is expected to launch these chips towards the end of Q3-2018.
Source:
Coolaler
Leading the pack is the Core i9-9900K. This chip is endowed with 8 cores, and HyperThreading enabling 16 threads. It features the full 16 MB of shared L3 cache available on the silicon. It also has some stellar clock speeds - 3.60 GHz nominal, with 5.00 GHz maximum Turbo Boost. You get the 5.00 GHz across 1 to 2 cores, 4.80 GHz across 4 cores, 4.70 GHz across 6 to 8 cores. Interestingly, the TDP of this chip remains unchanged from its predecessor, at 95 W. Next up, is the Core i7-9700K. This chip apparently succeeds the i7-8700K. It has 8 cores, but lacks HyperThreading.
Lastly, there's the Core i5-9600K. There's far too little changed from the current 8th generation Core i5 parts. These are still 6-core/6-thread parts. The nominal clock is the highest of the lot, at 3.70 GHz. You get 4.60 GHz 1-core boost, 4.50 GHz 2-core boost, 4.40 GHz 4-core boost, and 4.30 GHz all-core. The L3 cache amount is still 9 MB.
The three chips are backwards-compatible with existing motherboards based on the 300-series chipset with BIOS updates. Intel is expected to launch these chips towards the end of Q3-2018.
121 Comments on Top Three Intel 9th Generation Core Parts Detailed
BTW, according to Techpowerup's nearly 23000 votes, there are equal % of Intel's last 3 gen and AMD's last 2 (1,5) gen owner's: 28-28%.
But if you want to compare it to i7-7820X; 3.6 GHz base, 4.0-4.3 GHz boost, remember that this CPU will have a small memory controller, no AVX-512, simpler core infrastructure, less cache, fewer PCIe lanes (yes, the interface is not free), etc., so a lower TDP than i7-7820X and slightly higher boost should be possible.
Besides, they rolled it out pretty quick. Shows how much they weren't blindsided or something.
Hindsight has revealed to me that perhaps going with the 8700K was a bad idea.
Not that I'd get much use out of it.. :\
@Valantar that would be really cool for an mITX board! But for practicality, having all those features on mATX would be more realistic, on top of cramming everything on the table.
For all my complaining in this thread, I have no doubt the upcoming 8-core Intel chip will be great if you have a motherboard and cooler to match, and can afford it.
8086K there first factory 5GHz.
Coffeelake has very good 14nm+++ yield quality that it allows them to join the 5GHz club.
Not Delidded!!
My 8700K @5.1GHz @1.41v with 75c load Cooled by EK
All 6 cores (AVX - 2)
Cinebench 15 single core score is 222
I'm curious about 9900K Cinebench 15 scores
One important note is that Ice Lake is ready and has been for quite some time, so if it's delayed all the way to mid/late 2019, Intel have had two extra years to fine tune it.
I'm looking forward to the i9 8c/16t.....back to intel I come :)
If it were up to me, I would have made the third backup-plan a port of Ice Lake to 14nm rather than two extra cores on Coffee Lake. It's of course way too late now, but a slighly modified Ice Lake (no AVX-512) on 14nm would have been a more interesting and innovative product for 2H 2018 than a "patched" Coffee Lake.
I completely agree with your backup plan option, though. 14nm Ice Lake would definitely have been preferable. But there are probably quite a few reasons for it ending up this way - multiple 10nm delays; an Ice Lake redesign taking far more time than adding cores to CFL; ICL likely having more transistors and thus requiring a bigger die on the same process. It's even possible Ice Lake continues the hunt for clock speeds at the cost of power, which 10nm would have alleviated/negated, but a 14nm redesign might have been more power hungry than CFL. I guess we'll never know, but it'd be nice if someone serious got an exclusive in-depth interview after I've lake launches.
You saw the minimal tweaks AMD did in Zen+, similarly, Intel can do small tweaks in their refinements. Massive delays to Ice Lake will allow Intel to do more of these ahead of release, they are certainly not sitting there doing nothing.
Intel haven't given any performance figures for Ice Lake yet, but if it brings similar cache improvements like Skylake-X/-SP in an even more refined form, that alone can give 3-4%. And if so, Ice Lake will be a larger overhaul than Skylake and Haswell. Overhauls can of course be more or less successful (just look at Bulldozer), but at least it's not a "Skylake 2". I would argue that your estimate of 5% IPC for Ice Lake gains is relatively conservative.
The 5066MHz is CL21
As for me mentioning a 5% IPC increase, I didn't mean that as an estimate at all, I was simply saying that that has been what Intel has managed over their last arch updates (Broadwell and Skylake, at least). Without anything to go by, I'd be expecting anywhere between 5-10% (less would be weird for putting the effort of an arch update into it; more would be the biggest jump in quite a while), but given how long this development cycle has been, I agree that 5% would be unexpectedly low. Still, throwing numbers out like this is at best a guessing game, and purely speculative. Also, I think we're in agreement on the potential for improvements during the delays; nothing ground-breaking (like they probably could have done if they'd been told "hey, you've got two more years to finish this, go nuts!"), but they've definitely had time to iron out bugs and tweak various parameters. You sound right in saying that ES silicon fabbed on a semi-broken process with power/frequency issues can still be used to iron out arhcitecture errata - at least unless those errata only show up at high clocks, which I don't think is very common. Not to mention that power issues probably aren't very problematic in engineering situations, as long as they have a few hefty heatsinks or AIOs lying around.
Btw, have you heard/read anything about whether Intel will be moving to a mesh interconnect with Ice Lake? I don't know if they can match SKL-X's cache hierarchy without one (given the changes in how caches are shared), but from what I've read the mesh comes with a noticeable power penalty. Of course, at least with a 4-core die, there's zero real difference between a mesh and a ring bus :P