AMD wants to leave the Barcelona (rather K10) debacle behind it as it moves closer to a newer processor architecture. This paves way for AMD to incorporate strong memory and system interface links. The G34 socket though touted to be a successor for the current socket 1207, is believed to be a standard socket for both enterprise and PC processors. AMD is working on a new CPU architecture codenamed 'Bulldozer'. Derivatives include monolithic 8-core and 12-core processors. The 12-core processor is now codenamed Magny-Cours, the 8-core part is called Sao Paulo. These processors could feature four parallel HyperTransport 3.0 interconnects, upto 12 MB of L3 cache and 512 KB L2 cache per core. It's known that AMD could be working on quad-channel DDR3 (both registered DDR3 under G3MX and unregistered). Socket G34 seems to have 1,974 pins.

The provision of four independent HyperTransport interconnects means that the fourth interconnect can be dedicated as a peer-to-peer interconnect between two sockets in a dual-socket setup, or its bandwidth split to form daisy-chains with multiple sockets. A prelude to AMD's Torrenza enterprise platform, which would allow use of several co-processors of different architectures including ClearSpeed to be embedded in workstations.