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VIA Nano QuadCore C4700

4
Cores
4
Threads
35 W
TDP
1333 MHz
Frequency
2000 MHz
Boost
ZX-C+
Codename
VIA nanoBGA2
Socket
Front
Front
Die Shot
Die Shot
VIA nanoBGA2
VIA nanoBGA2
The VIA Nano QuadCore C4700 is a mobile processor with 4 cores, launched in January 2015. It is part of the Nano Quad lineup, using the Isaiah II architecture with VIA nanoBGA2. To further increase overall system performance, up to two Nano QuadCore C4700 CPUs can work together in a multi-processor (SMP) configuration. Nano QuadCore C4700 has 2 MB of L2 cache and operates at 1333 MHz by default, but can boost up to 2000 MHz, depending on the workload. VIA is making the Nano QuadCore C4700 on a 28 nm production node, the transistor count is unknown. The silicon die of the chip is not fabricated at VIA, but at the foundry of TSMC. The multiplier is locked on Nano QuadCore C4700, which limits its overclocking potential.
With a TDP of 35 W, the Nano QuadCore C4700 consumes only little energy. VIA's processor supports DDR3 memory with a single-channel interface. The highest officially supported memory speed is 1333 MT/s, but with overclocking (and the right memory modules) you can go even higher.
Hardware virtualization is available on the Nano QuadCore C4700, which greatly improves virtual machine performance. Programs using Advanced Vector Extensions (AVX) can run on this processor, boosting performance for calculation-heavy applications. Besides AVX, VIA is including the newer AVX2 standard, too, but not AVX-512.

Physical

Socket: VIA nanoBGA2
Foundry: TSMC
Process Size: 28 nm
Die Size: 46 mm²
Package: FC-BGA400

Processor

Market: Mobile
Production Status: Active
Release Date: 2015
Part#: unknown

Performance

Frequency: 1333 MHz
Turbo Clock: up to 2000 MHz
Base Clock: 333 MHz
Multiplier: 4.0x
Multiplier Unlocked: No
TDP: 35 W

Architecture

Codename: ZX-C+
Generation: Nano Quad
(Isaiah II)
Memory Support: DDR3
Rated Speed: 1333 MT/s
Memory Bus: Single-channel
ECC Memory: No
Chipsets: VIA VX900, VIA VX11

Core Config

# of Cores: 4
# of Threads: 4
SMP # CPUs: 2
Integrated Graphics: On certain motherboards (Chipset feature)

Cache

Cache L1: 64 KB (per core)
Cache L2: 2 MB (shared)

Features

  • MMX
  • SSE
  • SSE2
  • SSE3
  • SSSE3
  • SSE4.1
  • SSE4.2
  • AVX
  • AVX2
  • AES
  • VT-x
  • BMI
  • BMI2
  • F16C
  • RDRAND
  • RDSEED
  • NX-bit
  • VIA Padlock
  • SMEP
  • x86-64

Notes

Also known as Zhaoxin KaiXian ZX-C+ C4700.
Jul 28th, 2024 04:14 EDT change timezone

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