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Russia Unveils Domestic 350 nm Lithography System Amid Sanctions

Russian and Belarusian semiconductor manufacturers have achieved a significant milestone in domestic chip production capabilities. In collaboration with Belarus-based Planar, the Zelenograd Nanotechnology Center (ZNTC) has developed a new lithography system supporting 350 nm process technology for 8-inch (200 mm) silicon wafers. This development represents a strategic response to Western sanctions severely restricting Russia's access to advanced semiconductor manufacturing equipment. The system employs solid-state laser technology to project circuit patterns onto photoresist-coated wafers through a photomask that defines the circuitry. After selective exposure, the photoresist undergoes chemical processing to build circuit structures. While the 350 nm node marks a critical capability for domestic semiconductor production, it sits almost three decades behind leading-edge fabrication processes in high-performance computing applications.

This technology is comparable to what powered Intel's Pentium II processors in the late 1990s. Despite this technological gap, the equipment will enable the production of various electronic components suitable for consumer electronics and certain specialized military applications where bleeding-edge performance isn't required. ZNTC has already outlined plans to develop a more advanced 130 nm lithography system by 2026 as part of a government-backed initiative to incrementally enhance domestic semiconductor capabilities. While unable to match the 3-5 nm processes currently deployed by global semiconductor leaders, this lithography system establishes a foundation for domestic chip manufacturing infrastructure, especially in the category of mature nodes. The success of this intermediate solution will likely influence government funding priorities as the country attempts to narrow the technological gap with Western semiconductor capabilities in the coming years.

Weebit Nano and DB HiTek Tape-out ReRAM Module in 130nm BCD Process

Weebit Nano Limited, a leading developer and licensor of advanced memory technologies for the global semiconductor industry, and tier-1 semiconductor foundry DB HiTek have taped-out (released to manufacturing) a demonstration chip integrating Weebit's embedded Resistive Random-Access Memory (ReRAM or RRAM) module in DB HiTek's 130 nm Bipolar-CMOS-DMOS (BCD) process. The highly integrated demo chips will be used for testing and qualification ahead of customer production, while demonstrating the performance and robustness of Weebit's technology.

This important milestone in the collaboration between Weebit and DB HiTek (previously announced on 19 October 2023) was completed on-schedule as part of the technology transfer process. The companies are working to make Weebit ReRAM available to DB HiTek customers for integration in their systems on chips (SoCs) as embedded non-volatile memory (NVM), and aim to have the technology qualified and ready for production in the second quarter of the 2025 calendar year. Weebit ReRAM is available now to select DB HiTek customers for design prototyping ahead of production.

Google Teams up with SkyWater to Create Open Source PDK for Silicon Design

Silicon design is a hard process. You start by defining design in a hardware description language (HDL) and finish by routing all the wires on the piece of silicon. This used to be done by using proprietary tools and silicon Process Design Kits (PDK) that were unique to silicon manufacturing facilities. Starting from Intel, Samsung, and TSMC, they all have a specific PDK that is used for their silicon manufacturing and it contains all of the specifications for their nodes. It contains design constrains/information on the number of metal layers, how close can two wires be to each other, etc.

In the aim to open-source silicon design and finally allow for fully open silicon design flow, Google has partnered with SkyWater to deliver an open-source PDK that will allow designers to produce silicon on an open platform. Despite being designed for an older 130 nm node, this represents a massive achievement as there was a lack of such a thing before. There is already existing open-source toolchain to create designs, but there wasn't a PDK to port them to. Now, the PDK is available and designers can manufacture 100% open source silicon at SkyWater's facilities. In the GitHub repository listed as a source below, you can find some examples on how you can use the PDK with open source tools as well.
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Jul 12th, 2025 03:28 CDT change timezone

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