Ever since the creation of A64FX for the Fugaku supercomputer, Fujitsu has been plotting the development of next-generation CPU design for accelerating AI and general-purpose HPC workloads in the data center. Codenamed Monaka, the CPU is the latest creation for TSMC's 2 nm semiconductor manufacturing node. Based on Armv9-A ISA, the CPU will feature up to 150 cores with Scalable Vector Extensions 2 (SVE2), so it can process a wide variety of vector data sets in parallel. Using a 3D chiplet design, the 150 cores will be split into different dies and placed alongside SRAM and I/O controller. The current width of the SVE2 implementation is unknown.

The CPU is designed to support DDR5 memory and PCIe 6.0 connection for attaching storage and other accelerators. To bring cache coherency among application-specific accelerators, CXL 3.0 is present as well. Interestingly, Monaka is planned to arrive in FY2027, which starts in 2026 on January 1st. The CPU will supposedly use air cooling, meaning the design aims for power efficiency. Additionally, it is essential to note that Monaka is not a processor that will power the post-Fugaku supercomputer. The post-Fugaku supercomputer will use post-Monaka design, likely iterating on the design principles that Monaka uses and refining them for the launch of the post-Fugaku supercomputer scheduled for 2030. Below are the slides from Fujitsu's presentation, in Japenese, which highlight the design goals of the CPU.

Acer unveiled its largest and most advanced glasses-free stereoscopic 3D display to date, the Acer SpatialLabs View Pro 27. Crafted as a state-of-the-art 3D canvas for creators and developers, the display elevates the way ideas and audiovisual elements take shape without needing specialized glasses or accessories. The device is powered by SpatialLabs's proven stereoscopic 3D solution and is complimented by the new Acer Immerse Audio system, along with a suite of advanced developer tools to bring out creations in their truest 3D forms. Users can also fully maximize its vast 27-inch 4K panel for magnified, lifelike visuals, while its ergonomic design and detachable hood provide comfortable viewing even under extremely low-light conditions.

Expanded Design for Mesmerizing 3D Illustrations
The Acer SpatialLabs View Pro 27 harmoniously combines cutting-edge 3D technology and stereo real-time rendering capabilities in an expanded landscape to support creators in bringing 3D experiences to life. The optimized 3D display uses an eye-tracking module to follow the position and movement of users in real-time even in dim environments. Crystal-clear details and image depth are projected as envisioned thanks to its 27-inch 4K UHD display with 2D and 3D modes, allowing users to switch between 2D and 3D stereoscopic views, along with the panel's 160 Hz refresh rate, 400 nits brightness, Delta E< 2 color accuracy. A detachable hood on the monitor enhances perceived color accuracy and lessens distractions, helping users stay focused and maintain image quality when viewing their designs on screen.

TSMC today announced the new 3Dblox 2.0 open standard and major achievements of its Open Innovation Platform (OIP) 3DFabric Alliance at the TSMC 2023 OIP Ecosystem Forum. The 3Dblox 2.0 features early 3D IC design capability that aims to significantly boost design efficiency, while the 3DFabric Alliance continues to drive memory, substrate, testing, manufacturing, and packaging integration. TSMC continues to push the envelope of 3D IC innovation, making its comprehensive 3D silicon stacking and advanced packaging technologies more accessible to every customer.

"As the industry shifted toward embracing 3D IC and system-level innovation, the need for industry-wide collaboration has become even more essential than it was when we launched OIP 15 years ago," said Dr. L.C. Lu, TSMC fellow and vice president of Design and Technology Platform. "As our sustained collaboration with OIP ecosystem partners continues to flourish, we're enabling customers to harness TSMC's leading process and 3DFabric technologies to reach an entirely new level of performance and power efficiency for the next-generation artificial intelligence (AI), high-performance computing (HPC), and mobile applications."

Synopsys, Inc. today announced it is extending its collaboration with TSMC to advance multi-die system designs with a comprehensive solution supporting the latest 3Dblox 2.0 standard and TSMC's 3DFabric technologies. The Synopsys Multi-Die System solution includes 3DIC Compiler, a unified exploration-to-signoff platform that delivers the highest levels of design efficiency for capacity and performance. In addition, Synopsys has achieved first-pass silicon success of its Universal Chiplet Interconnect Express (UCIe) IP on TSMC's leading N3E process for seamless die-to-die connectivity.

"TSMC has been working closely with Synopsys to deliver differentiated solutions that address designers' most complex challenges from early architecture to manufacturing," said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. "Our long history of collaboration with Synopsys benefits our mutual customers with optimized solutions for performance and power efficiency to help them address multi-die system design requirements for high-performance computing, data center, and automotive applications."

What's New: Intel today announced one of the industry's first glass substrates for next-generation advanced packaging, planned for the latter part of this decade. This breakthrough achievement will enable the continued scaling of transistors in a package and advance Moore's Law to deliver data-centric applications.

"After a decade of research, Intel has achieved industry-leading glass substrates for advanced packaging. We look forward to delivering these cutting-edge technologies that will benefit our key players and foundry customers for decades to come."
-Babak Sabi, Intel senior vice president and general manager of Assembly and Test Development

AMD today announced revenue for the second quarter of 2023 of $5.4 billion, gross margin of 46%, operating loss of $20 million, net income of $27 million and diluted earnings per share of $0.02. On a non-GAAP basis, gross margin was 50%, operating income was $1.1 billion, net income was $948 million and diluted earnings per share was $0.58.

"We delivered strong results in the second quarter as 4th Gen EPYC and Ryzen 7000 processors ramped significantly," said AMD Chair and CEO Dr. Lisa Su. "Our AI engagements increased by more than seven times in the quarter as multiple customers initiated or expanded programs supporting future deployments of Instinct accelerators at scale. We made strong progress meeting key hardware and software milestones to address the growing customer pull for our data center AI solutions and are on-track to launch and ramp production of MI300 accelerators in the fourth quarter."

NVIDIA joined Pixar, Adobe, Apple and Autodesk today to found the Alliance for OpenUSD, a major leap toward unlocking the next era of 3D graphics, design and simulation. The group will standardize and extend OpenUSD, the open-source Universal Scene Description framework that's the foundation of interoperable 3D applications and projects ranging from visual effects to industrial digital twins.

Several leading companies in the 3D ecosystem already signed on as the alliance's first general members—Cesium, Epic Games, Foundry, Hexagon, IKEA, SideFX and Unity. Standardizing OpenUSD will accelerate its adoption, creating a foundational technology that will help today's 2D internet evolve into a 3D web. Many companies are already working with NVIDIA to pioneer this future.

ASUS Republic of Gamers (ROG) today announced the new ROG Strix SCAR 17 X3D, the perfect fusion of cutting-edge silicon and ROG engineering. Featuring the AMD Ryzen 9 7945HX3D mobile processor equipped with AMD 3D V-Cache technology for the very first time, the Strix SCAR 17 X3D takes performance to a whole new level. By doubling the L3 cache of the mighty Ryzen 9 7945HX processor, the Ryzen 9 7945HX3D gives users a boost in games that are hungry for this onboard ultrafast memory. Paired with a 240 Hz QHD display, Conductonaut Extreme liquid metal on the GPU, and a vapor chamber, the Strix SCAR 17 X3D is ready to dominate the leaderboards.

Making great processors even better
While the original 2023 ROG Strix SCAR 17 came equipped with AMD Ryzen 7000 Series processors, the AMD Ryzen 9 7945HX3D is truly in a league of its own. It leverages the power of AMD 3D V-Cache technology, a stacking of extra ultra-high-speed L3 cache vertically on top of one of the two core compute dies (CCD). This extra cache enables the eight cores to perform certain calculations quickly and efficiently, notably in gaming. For situations where increasing CPU frequency simply doesn't show significant performance gains, 3D V-Cache technology holds the potential to unlock extra compute power.

NEO Semiconductor, a leading developer of innovative technologies for 3D NAND flash and DRAM memory, today announced its participation at Flash Memory Summit 2023, taking place in person in Santa Clara, California, on August 8-10. CEO, Andy Hsu, will deliver a keynote address titled "New Architectures which will Drive Future 3D NAND and 3D DRAM Solutions" on August 9th at 11:40 a.m. Pacific Time.

Earlier this year, Neo Semiconductor announced the launch of its ground-breaking technology, 3D X-DRAM. This development is the world's first 3D NAND-like DRAM cell array that is targeted to solve DRAM's capacity bottleneck and replace the entire 2D DRAM market. 3D X-DRAM can be manufactured using the existing 3D NAND flash memory process with minor changes, significantly reducing the time and cost spent developing a new 3D process. During the keynote, Mr. Hsu will reveal the 3D X-DRAM process flow and technical details.

Micron Technology, Inc. today announced it has begun sampling the industry's first 8-high 24 GB HBM3 Gen2 memory with bandwidth greater than 1.2 TB/s and pin speed over 9.2 Gb/s, which is up to a 50% improvement over currently shipping HBM3 solutions. With a 2.5 times performance per watt improvement over previous generations, Micron's HBM3 Gen2 offering sets new records for the critical artificial intelligence (AI) data center metrics of performance, capacity and power efficiency. These Micron improvements reduce training times of large language models like GPT-4 and beyond, deliver efficient infrastructure use for AI inference and provide superior total cost of ownership (TCO).

The foundation of Micron's high-bandwidth memory (HBM) solution is Micron's industry-leading 1β (1-beta) DRAM process node, which allows a 24Gb DRAM die to be assembled into an 8-high cube within an industry-standard package dimension. Moreover, Micron's 12-high stack with 36 GB capacity will begin sampling in the first quarter of calendar 2024. Micron provides 50% more capacity for a given stack height compared to existing competitive solutions. Micron's HBM3 Gen2 performance-to-power ratio and pin speed improvements are critical for managing the extreme power demands of today's AI data centers. The improved power efficiency is possible because of Micron advancements such as doubling of the through-silicon vias (TSVs) over competitive HBM3 offerings, thermal impedance reduction through a five-time increase in metal density, and an energy-efficient data path design.

Tipsters have noticed that ASUS is preparing a new high-end laptop with an unannounced AMD processor—the upcoming ROG Strix SCAR 17-inch model (G733PYV-LL046W,) will apparently sport a Ryzen 9 7945HX3D APU (with 128 MB of L3 cache). The inclusion of "X3D" in the processor's name has generated a lot of interest, given that Team Red's 3D V-Cache technology has existed mainly within mainstream desktop-oriented Ryzen 7000 and 5000 processor lineups. This leaked dual-CCD APU is probably being lined up to take on upper-echelon Intel Raptor Lake-HX processors, as well as refreshed variants.

The leak indicates that this APU will likely sit at the top of the Zen 4-based Dragon Range-H lineup—being a 5.4 GHz max. boost clock, 16-core/32-thread CPU, with a configurable TDP (between 55 W and 75 W) and Radeon 610M iGPU. The host ASUS ROG Strix SCAR 17 laptop is no slouch thanks to some very generous hardware specifications, including a mobile NVIDIA RTX 4090 GPU, 32 GB of DDR5 memory, 2 TB SSD, and a 17.3" 240 Hz IPS display. Listed at 5599 AUD (~$3800) on Computer Alliance, or £3904.79 (~$5000) chez Lamba-Tek, you would expect the best possible performance for those prices. The two online retailers have not confirmed any concrete release dates for the high-end ASUS laptop.

NVIDIA RTX is spinning new cycles for designs. Trek Bicycle is using GPUs to bring design concepts to life. The Wisconsin-based company, one of the largest bicycle manufacturers in the world, aims to create bikes with the highest-quality craftsmanship. With its new partner Lidl, an international retailer chain, Trek Bicycle also owns a cycling team, now called Lidl-Trek. The team is competing in the annual Tour de France stage race on Trek Bicycle's flagship lineup, which includes the Emonda, Madone and Speed Concept. Many of the team's accessories and equipment, such as the wheels and road race helmets, were also designed at Trek.

Bicycle design involves complex physics—and a key challenge is balancing aerodynamic efficiency with comfort and ride quality. To address this, the team at Trek is using NVIDIA A100 Tensor Core GPUs to run high-fidelity computational fluid dynamics (CFD) simulations, setting new benchmarks for aerodynamics in a bicycle that's also comfortable to ride and handles smoothly. The designers and engineers are further enhancing their workflows using NVIDIA RTX technology in Dell Precision workstations, including the NVIDIA RTX A5500 GPU, as well as a Dell Precision 7920 running dual RTX A6000 GPUs.

Scientists at the Tokyo Institute of Technology have developed a new type of stacked or 3D DRAM that the researchers call Bumpless Build Cube 3D or BBCube 3D, which relies on Through Silicon Vias or TSVs to connect the DRAM dies. This is a different approach to HBM which relies on micro bumps to connect the layers together and the Japanese scientists are saying that their bumpless wafer-on-wafer solution should allow not only for an easier manufacturing process, but more importantly, improved cooling, as the TSVs can channel the heat from the DRAM dies down into whatever substrate the BBCube 3D stack is finally mounted onto.

If that wasn't enough, the researchers believe that BBCube 3D will be able to deliver higher speeds than HBM courtesy of a combination of the TSVs being relatively short and "high-density signal parallelism". BBCube 3D is expected to deliver up to a 32 fold increase in bandwidth compared to DDR5 memory and a four fold increase compared to HBM2E memory, while at the same time, drawing less power. The research paper goes into a lot more details for those interested at taking a closer look at this potentially revolutionary shift in DRAM assembly. However, the question that remains unanswered is if this will end up as a real world product some time in the near future, which is all based on how manufacturable BBCube 3D memory will be.

Lam Research Corp. (Nasdaq: LRCX) today introduced Coronus DX, the industry's first bevel deposition solution optimized to address key manufacturing challenges in next-generation logic, 3D NAND and advanced packaging applications. As semiconductors continue to scale, manufacturing becomes increasingly complex with hundreds of process steps needed to build nanometer-sized devices on a silicon wafer. In a single step, Coronus DX deposits a proprietary layer of protective film on both sides of the wafer edge that helps prevent defects and damage that can often occur during advanced semiconductor manufacturing. This powerful protection increases yield and enables chipmakers to implement new leading-edge processes for the production of next-generation chips. Coronus DX is the newest addition to the Coronus product family and extends Lam's leadership in bevel technology.

"In the era of 3D chipmaking, production is complex and costly," said Sesha Varadarajan, senior vice present of the Global Products Group at Lam Research. "Building on Lam's expertise in bevel innovation, Coronus DX helps drive more predictable manufacturing and significantly higher yield, paving the way for adoption of advanced logic, packaging and 3D NAND production processes that weren't previously feasible."

NVIDIA's H100 Hopper GPU is a device designed for pure AI and other compute workloads, with the least amount of consideration for gaming workloads that involve graphics processing. However, it is still interesting to see how this 30,000 USD GPU fairs in comparison to other gaming GPUs and whether it is even possible to run games on it. It turns out that it is technically feasible but not making much sense, as the Chinese YouTube channel Geekerwan notes. Based on the GH100 GPU SKU with 14,592 CUDA, the H100 PCIe version tested here can achieve 204.9 TeraFLOPS at FP16, 51.22 TeraFLOPS at FP32, and 25.61 TeraFLOPS at FP64, with its natural power laying in accelerating AI workloads.

However, how does it fare in gaming benchmarks? Not very well, as the testing shows. It scored 2681 points in 3DMark Time Spy, which is lower than AMD's integrated Radeon 680M, which managed to score 2710 points. Interestingly, the GH100 has only 24 ROPs (render output units), while the gaming-oriented GA102 (highest-end gaming GPU SKU) has 112 ROPs. This is self-explanatory and provides a clear picture as to why the H100 GPU is used for computing only. Since it doesn't have any display outputs, the system needed another regular GPU to provide the picture, while the computation happened on the H100 GPU.

Barron's Magazine has been on a technology industry kick this week and published their interview with AMD CEO Dr. Lisa Su on May 3. The interviewer asks Su about her views on Moore's Law and it becomes apparent that she remains a believer of Gordon Moore's (more than half-century old) prediction - Moore, an Intel co-founder passed away in late March. Su explains that her company's engineers will need to innovate in order to carry on with that legacy: "I would certainly say I don't think Moore's Law is dead. I think Moore's Law has slowed down. We have to do different things to continue to get that performance and that energy efficiency. We've done chiplets - that's been one big step. We've now done 3-D packaging. We think there are a number of other innovations, as well." Expertise in other areas is also key in hitting technological goals: "Software and algorithms are also quite important. I think you need all of these pieces for us to continue this performance trajectory that we've all been on."

When asked about the challenges involved in advancing CPU designs within limitations, Su responds with: "Yes. The transistor costs and the amount of improvement you're getting from density and overall energy reduction is less from each generation. But we're still moving (forward) generation to generation. We're doing plenty of work in 3 nanometer today, and we're looking beyond that to 2 nm as well. But we'll continue to use chiplets and these type of constructions to try to get around some of the Moore's Law challenges." AMD and Intel continue to hold firm with Moore's Law, even though slightly younger upstarts disagree (see NVIDIA). Dr. Lisa Su's latest thoughts stay consistent with her colleague's past statements - AMD CTO Mark Papermaster reckoned that the theory is pertinent for another six to eight years, although it could be a costly endeavor for AMD - the company believes that it cannot double transistor density every 18 to 24 months without incurring extra expenses.

NEO Semiconductor, a leading developer of innovative technologies for 3D NAND flash and DRAM memory, today announced the launch of its ground-breaking technology, 3D X-DRAM. This development is the world's first 3D NAND-like DRAM cell array that is targeted to solve DRAM's capacity bottleneck and replace the entire 2D DRAM market. Relevant patent applications were published with the United States Patent Application Publication on April 6, 2023.

"3D X-DRAM will be the absolute future growth driver for the Semiconductor industry," said Andy Hsu, Founder and CEO of NEO Semiconductor and an accomplished technology inventor with more than 120 U.S. patents. "Today I can say with confidence that Neo is becoming a clear leader in the 3D DRAM market. Our invention, compared to the other solutions in the market today, is very simple and less expensive to manufacture and scale. The industry can expect to achieve 8X density and capacity improvements per decade with our 3D X-DRAM."

Ansys and TSMC continue their long-standing technology collaboration to announce the certification of Ansys' power integrity software for TSMC's N2 process technology. The TSMC N2 process, which adopts nanosheet transistor structure, represents a major advancement in semiconductor technology with significant speed and power advantages for high performance computing (HPC), mobile chips, and 3D-IC chiplets. Both Ansys RedHawk-SC and Ansys Totem are certified for power integrity signoff on N2, including the effects of self-heat on long-term reliability of wires and transistors. This latest collaboration builds on the recent certification of the Ansys platform for TSMC's N4 and N3E FinFLEX processes.

"TSMC works closely with our Open Innovation Platform (OIP) ecosystem partners to help our mutual customers achieve the best design results with the full stack of design solutions on TSMC's most advanced N2 process," said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. "Our latest collaboration with Ansys RedHawk-SC and Totem analysis tools allows our customers to benefit from the significant power and performance improvements of our N2 technology while ensuring predictively accurate power and thermal signoff for the long-term reliability of their designs."

Accelerating the integration of heterogeneous dies to enable the next level of system scalability and functionality, Synopsys, Inc. (Nasdaq: SNPS) has strengthened its collaboration with TSMC and Ansys for multi-die system design and manufacturing. Synopsys provides the industry's most comprehensive EDA and IP solutions for multi-die systems on TSMC's advanced 7 nm, 5 nm and 3 nm process technologies with support for TSMC 3DFabric technologies and 3Dblox standard. The integration of Synopsys implementation and signoff solutions and Ansys multi-physics analysis technology on TSMC processes allows designers to tackle the biggest challenges of multi-die systems, from early exploration to architecture design with signoff power, signal and thermal integrity analysis.

"Multi-die systems provide a way forward to achieve reduced power and area and higher performance, opening the door to a new era of innovation at the system-level," said Dan Kochpatcharin, head of Design Infrastructure Management Division at TSMC. "Our long-standing collaboration with Open Innovation Platform (OIP) ecosystem partners like Synopsys and Ansys gives mutual customers a faster path to multi-die system success through a full spectrum of best-in-class EDA and IP solutions optimized for our most advanced technologies."

Explore the world of Ospolis and discover fabulous treasures in this comic book style FPS. The Explorator is a game inspired by oldschool FPS with a cell shading visual style, as an explorer you take your courage in both hands to set foot on the most dangerous island of the known world, Ospolis.

Legends say that the legendary city of Atlantis lies beneath this island, which has been suddenly overrun by goblins and monsters that have emerged from the bowels of the underground tunnels drilled by unwary explorers confident of finding this famous city. Explore mysterious counter-zones and brave dangers to discover priceless treasures buried beneath the ruins of Atlantis.

AMD's EPYC lineup already features the new Zen 4 core designed for better performance and efficiency. However, since the release of EPYC Milan-X processors with 3D V-cache integrated into server offerings, we wondered if AMD will continue to make such SKUs for upcoming generations. According to the report from Wccftech, we have a leaked table of specifications that showcase what some seemingly top-end Genoa-X SKUs will look like. The two SKUs listed here are the "100-000000892-04" coded engineering sample and the "100-000000892-06" coded retail sample. With support for the same SP5 platform, these CPUs should be easily integrated with the existing offerings from OEM.

As far as specifications, this processor features 384 MBs of L3 cache coming from CCDs, 768 MBs of L3 cache from the 3D V-Cache stacks, and 96 MBs of L2 cache for a total of 1248 MBs in the usable cache. A 3 MB stack of L1 cache is also dedicated to instructions and primary CPU data. Compared to the regular Genoa design, this is a 260% increase in cache sizes, and compared to Milan-X, the Genoa-X design also progresses with 56% more cache. With a TDP of up to 400 Watts, configurable to 320 Watts, this CPU can boost up to 3.7 GHz. AMD EPYC Genoa-X CPUs are expected to hit the shelves in the middle of 2023.

Acer will be participating in the Game Developers Conference (GDC) 2023 held from March 20-24 in San Francisco to share the latest innovations of its industry-leading SpatialLabs experience. It combines advanced eye-tracking cameras, a stereoscopic 3D display and stereo rendering capabilities to deliver immersive 3D experiences without the need for specialized glasses. With a click of a button, 2D visuals seem to pop out of their screens, giving designers, marketers, and other professionals a unique way of interacting with their creations in 3D views.

SpatialLabs TrueGame
Following its launch in 2021, Acer took it up a notch by bringing its glasses-free stereoscopic 3D technology to the world of gaming through the SpatialLabs TrueGame application. With a Predator Helios 300 SpatialLabs Edition laptop, or a SpatialLabs View display paired with a PC, users can enjoy the supported titles in their true 3D form, delivering immersive gaming experiences as envisioned by their developers. This is possible because games are mostly created with a three-dimensional world in mind as developers include information about depth in each scene and object they build. SpatialLabs leverages this already-existing information in order to present the games in stereoscopic 3D. A dedicated pre-configured profile is now available for each game title, among the 70+ modern and classic titles on launch, to offer players a seamless experience with their favorite games. More profiles for additional titles will be added on a continuous basis moving forward.

Pure Storage, a maker of various storage solutions and custom enterprise-grade SSDs, claims the company will produce SSDs with up to 300 TBs of capacity by 2026. In an interview with Pure Storage CTO Alex McMullan, Blocks & Files got exclusive information that the company targets SSD capacities of up to 300 TBs in 2026. Pure Storage creates proprietary Direct Flash Modules (DFM) SSDs which use 3D NAND chips controlled by a custom SSD controller, are used in the FlashArray systems, and run on a custom FlashBlade operating system. This level of customization allows Pure Storage to create SSD drives with remarkable capacities in the future as the 3D NAND technology advances.

In the coming years, 3D NAND flash manufacturers will switch from the current 200-layer chips to the 400/500-layer chips, driving storage density to new highs. As manufacturers update their technology, so does Pure with its DFM cards that use regular U.2 NVMe connectors in a custom ruler-style format made explicitly for Pure FlashArray systems. Compared to upcoming HDDs that Toshiba and Seagate will use, Pure Storage DFM SSDs will have much higher capacities and read/write speeds, especially as higher-density 3D NAND arrives. You can see the comparison of Pure's estimates for the future 300 TB SSDs with future HDD technology.

The future of 3D viewing is here: United States reservations are now open for Leia Inc.'s Lume Pad 2, the world's first 3D•AI tablet equipped with embedded technology to create fully immersive 3D calling, streaming, and gaming experiences along with content sharing and creation apps - all without the need for any eyewear. Starting today, the Lume Pad 2 is available for reservation via LeiaInc.com at a suggested retail price of $1,099. Customers who reserve before March 31 will receive a $100 discount when they confirm their order in April, when tablets begin shipping.

"With Leia's unique 3D•AI experiences, now available worldwide, people no longer have to settle for unnatural interactions like video chat on a flat screen," said Cecilia Qvist, CEO, Leia Inc. "Lume Pad 2 is for anyone who has ever sought a more genuine human connection from their online experiences." "We know that 3D isn't new - but how we do it is," said David Fattal, Leia Inc. co-founder and CTO. "With the world focused on how AI will continue to shape our future, we feel that this is one of its most thrilling applications - giving the naked eye a fully immersive 3D viewing experience that we believe makes Lume Pad 2 a 3D device for everyone."

AMD's upcoming Ryzen 9 7950X3D processor will bring 16 cores and 32 threads along with 16 MB of L2 cache and 128 MB of L3 cache for 144 MB of 3D V-cache present on the package. Today, we get to see it in action for the first time in benchmarks like Blender for 3D content creation and Geekbench 5 for synthetic benchmarks, where we get to compare the scores to the already existing models. In Blender, the new AMD Ryzen 9 7950X3D scores 558.59 points, while the regular Ryzen 9 7950X scores 590.28 points. This represents a 5.4% regression from the original model; however, we are yet to see how other content creation benchmarks suit the new CPU.

For Geekbench 5 synthetics, the upcoming Ryzen 9 7950X3D scores 2,157 points in the single-core score and 21,841 points in the multi-core score. The regular Ryzen 9 7950X can reach around 2246 points for single-core and 25,275 points for multi-core score, which is relatively faster than the new cache-enhanced Ryzen 9 7950X3D design. Of course, some of these benchmark results show that the 4.2 GHz base frequency of Ryzen 9 7950X3D plays a significant role in the overall performance comparison, given that the regular Ryzen 9 7950X is set to a 4.5 GHz base clock. Both designs share the same 5.7 GHz boost speed, so we have yet to see more benchmarks showing other differences induced by larger cache sizes.