Winbond has joined the UCIe (Universal Chiplet Interconnect Express) Consortium, the industry Consortium dedicated to advancing UCIe technology. This open industry standard defines interconnect between chiplets within a package, enabling an open chiplet ecosystem and facilitating the development of advanced 2.5D/3D devices.

A leader in high-performance memory ICs, Winbond is an established supplier of known good die (KGD) needed to assure end-of-line yield in 2.5D/3D assembly. 2.5D/3D multichip devices are needed to realize the exponential improvements in performance, power efficiency, and miniaturization, demanded by the explosion of technologies such as 5G, Automotive, and Artificial Intelligence (AI).

During its CES 2023 keynote, AMD announced its latest Instinct MI300 APU, a first of its kind in the data center world. Combining the CPU, GPU, and memory elements into a single package eliminates latency imposed by long travel distances of data from CPU to memory and from CPU to GPU throughout the PCIe connector. In addition to solving some latency issues, less power is needed to move the data and provide greater efficiency. The Instinct MI300 features 24 Zen4 cores with simultaneous multi-threading enabled, CDNA3 GPU IP, and 128 GB of HBM3 memory on a single package. The memory bus is 8192-bit wide, providing unified memory access for CPU and GPU cores. CLX 3.0 is also supported, making cache-coherent interconnecting a reality.

The Instinct MI300 APU package is an engineering marvel of its own, with advanced chiplet techniques used. AMD managed to do 3D stacking and has nine 5 nm logic chiplets that are 3D stacked on top of four 6 nm chiplets with HBM surrounding it. All of this makes the transistor count go up to 146 billion, representing the sheer complexity of a such design. For performance figures, AMD provided a comparison to Instinct MI250X GPU. In raw AI performance, the MI300 features an 8x improvement over MI250X, while the performance-per-watt is "reduced" to a 5x increase. While we do not know what benchmark applications were used, there is a probability that some standard benchmarks like MLPerf were used. For availability, AMD targets the end of 2023, when the "El Capitan" exascale supercomputer will arrive using these Instinct MI300 APU accelerators. Pricing is unknown and will be unveiled to enterprise customers first around launch.

Acer today announced a major update to its SpatialLabs TrueGame, the glasses-free 3D gaming application, with the addition of a 3D Ultra mode. The new feature offers gamers the ultimate 3D gaming experience with its enhanced stereo rendering capabilities, projecting images with depth and life-like 3D geometry. SpatialLabs TrueGame was designed for gamers who love to explore and lose themselves in immersive gameplay, serving as a medium to explore and experience new realities when they set off on their quests for treasure and glory.

The new update also includes 3D Sense, a collection of 3D stereo effect configurations to match the players' preferences in terms of visual details, effects, and 3D depth intensity. TrueGame allows the game to be presented in a way that is tailored for different players and continues to support game titles with new profiles added every month, including today's list of AAA titles and former top classics that users can enjoy in their full 3D glory.

Chinese processor designers need help creating a leading-edge design that satisfies their needs, with the imposed sanctions and restrictions of Western countries. However, designers are using creative ways to make a server processor to fulfill their needs. According to the latest Sina report, Chinese company Loongson has developed a 32-core processor using chiplet technology. Previously, the company announced its 16-core 3C5000 processor based on LA464 cores, which utilize LoongArch ISA. Loongson used chiplet technology to fuse two 3C5000 processors into a single-socket solution called 3D5000, which features 32 LA464 cores to create a higher-performing design. Based on the LGA-4129 package, the chip size is 75.4x58.5×6.5 mm.

The company claims that the typical power consumption is rated for 130 Watts at 2.0 GHz or 170 Watts at 2.2 GHz, with TDP power consumption not exceeding 300 Watts at 2.2 GHz even with peaks. The performance of the new 3D5000 processor, measured using SPEC2006, is 400 points and 800 points for single-socket and dual-socket servers, respectively. The four-socket server is expected to reach 1600 points in the same benchmark, so scaling is advertised as linear. Loongson hopes to provide samples to industry partners in the first half of 2023 with an unknown price tag.

peel 3d, the developers of best-in-class professional-grade 3D scanners that offer superior value at unmatched price points, today announced the launch of peel 3 and peel 3.CAD—two new scanners that will elevate the 3D scanning experience for professional users across many different sectors without compromising affordability.

peel 3 and peel 3.CAD handle like a charm as they feature a revamped ergonomic design unlike any other on the market and an intuitive multi-function touchscreen interface. Industry-first haptic user communication through vibration simplifies generating high-quality 3D scans regardless of users' skill levels. Improved resolution and performance for more complex geometries, surfaces and colours provide additional versatility to 3D scan any type of object.

As reported by BusinessKorea, Apple, one of the largest companies in the world, will source its 3D NAND from Chinese memory maker Yangtze Memory Technologies Corp (YMTC). Known for supplying 3D NAND to Chinese SSD makers, YTMC's reported contract with Apple will fuel the upcoming iPhone 14 SKU manufacturing. Whether or not this partnership will expand to other products, it is essential to have as many storage sources as possible, as Apple sells millions of devices per year. YTMC is on track to deliver 3D NAND flash with the latest Xstacking 3.0 six-plane architecture that provides triple-level cell storage with I/O speeds of 2400 MT/s.

YTMC has joined the list of 3D NAND flash vendors that Apple works with, including SK Hynix, Samsung, Kioxia, and possibly others. This partnership also highlights that the Chinese memory output is sufficient and significant enough to break into more markets worldwide, not remaining exclusive to domestic use.

Kioxia Corporation, the world leader in memory solutions, today announced the launch of the second generation of XL-FLASH, a Storage Class Memory (SCM) solution based on its BiCS FLASH 3D flash memory technology, which significantly reduces bit cost while providing high performance and low latency. Product sample shipments are scheduled to start in November this year, with volume production expected to begin in 2023.

The second generation XL-FLASH achieves significant reduction in bit cost as a result of the addition of new multi-level cell (MLC) functionality with 2-bit per cell, in addition to the single-level cell (SLC) of the existing model. The maximum number of planes that can operate simultaneously has also increased from the current model, which will allow for improved throughput. The new XL-FLASH will have a memory capacity of 256 gigabits.

AI at the edge comes with a host of challenges: limited processing resources, small storage capacities, insufficient memory, security concerns, electrical power requirements, limited physical space on edge devices, and excessive costs. That being said, there is an enormous need for AI at the edge - for devices to learn fast and make decisions in real time. Issues such as latency and distance are current drawbacks that hold edge-to-cloud AI back from reaching its full potential. In some cases, cloud data centers can be as far as hundreds or even thousands of kilometers away from edge devices. Reducing the distance and therefore the latency, by bringing AI into the edge device itself, can open up a world of new possibilities. And, compared to edge-to-cloud AI, AI-enabled edge devices don't need to rely on a stable internet connection, nor do they have as much vulnerability to cyber-security issues, because they don't send data offsite.

Edge AI box computers equipped with compact and high-capacity storage is one of the key factors to make AI come true at the edge. By offloading computation and storage from the cloud to the edge itself, edge computing is enhancing the power and capabilities of the IoT. To help make this a reality, SP Industrial has launched the new MEA3FEV0 SSD Series. This industrial-grade PCIe Gen 3x4 SSD series features support for NVMe 1.3 and BiCS5 112-layer 3D TLC NAND Flash technology. It ticks many boxes that are common problems for edge AI computing: large storage capacities up to 2 TB, small M.2 2242 form factor for minimal space usage, lower power consumption compared to BiCS4, and affordable cost with a DRAM-less design.

The Exascale supercomputing race is now well underway, as the US-based Frontier supercomputer got delivered, and now we wait to see the remaining systems join the race. Today, during 79th HPC User Forum at Oak Ridge National Laboratory (ORNL), Terri Quinn at Lawrence Livermore National Laboratory (LLNL) delivered a few insights into what El Capitan exascale machine will look like. And it seems like the new powerhouse will be based on AMD's Instinct MI300 APU. LLNL targets peak performance of over two exaFLOPs and a sustained performance of more than one exaFLOP, under 40 megawatts of power. This should require a very dense and efficient computing solution, just like the MI300 APU is.

As a reminder, the AMD Instinct MI300 is an APU that combines Zen 4 x86-64 CPU cores, CDNA3 compute-oriented graphics, large cache structures, and HBM memory used as DRAM on a single package. This is achieved using a multi-chip module design with 2.5D and 3D chiplet integration using Infinity architecture. The system will essentially utilize thousands of these APUs to become one large Linux cluster. It is slated for installation in 2023, with an operating lifespan from 2024 to 2030.

Intel's Arc Alchemist graphics cards launched in laptop/mobile space, and everyone is wondering just how well the first generation of discrete graphics performs in actual, GPU-accelerated workloads. Tellusim Technologies, a software company located in San Diego, has managed to get ahold of a laptop featuring an Intel Arc A370M mobile graphics card and benchmark it against other competing solutions. Instead of using Vulkan API, the team decided to use D3D12 API for tests, as the Vulkan usually produces lower results on the new 12th generation graphics. With the 30.0.101.1736 driver version, this GPU was mainly tested in the standard GPU working environment like triangles and batches. Meshlet size is set to 69/169, and the job is as big as 262K Meshlets. The total amount of geometry is 20 million vertices and 40 million triangles per frame.

Using the tests such as Single DIP (drawing 81 instances with u32 indices without going to Meshlet level), Mesh Indexing (Mesh Shader emulation), MDI/ICB (Multi-Draw Indirect or Indirect Command Buffer), Mesh Shader (Mesh Shaders rendering mode) and Compute Shader (Compute Shader rasterization), the Arc GPU produced some exciting numbers, measured in millions or billions of triangles. Below, you can see the results of these tests.

Acer today announced two additions to its SpatialLabs lineup of products: the Acer SpatialLabs View for personal entertainment and Acer SpatialLabs View Pro for commercial audiences. Both are standalone 15.6-inch 4K displays that can be connected to another PC, providing users with portable access to the SpatialLabs suite of experiences. Not just intended for highly-skilled creators, however, this generation of devices brings glasses-free stereoscopic 3D technology to gamers and home-entertainment enthusiasts, too.

Gamers and creators alike will appreciate the series' lightweight design (less than 1.5 kg / 3.3 lbs), making it easy to put in a bag and take to a LAN party or product pitch session. Creators in particular can depend on 100% coverage of the Adobe RGB color gamut, but gamers will also appreciate the devices' 400 nits of brightness. While the Acer SpatialLabs View comes with an all-new stereoscopic 3D gaming platform, the Acer SpatialLabs View Pro comes with both the technology necessary to realize a user's creations and also an intelligent industrial design that simplifies deployment—a combination that leads to more impactful storytelling opportunities.

Acer today announced the Predator Helios 300 SpatialLabs Edition gaming laptop, bringing glasses-free, stereoscopic 3D to the world of gaming. Through the SpatialLabs TrueGame application, it will support over 50 popular games at launch, and support for additional titles will be added on a continuous basis moving forwards. Alongside the 3D gaming laptop, Acer also announced the Predator Triton 300 SE thin gaming laptop, and the Predator XB273K LV and Acer Nitro XV272U RV gaming monitors.

"We're excited to add a new dimension to gaming with the Predator Helios 300 SpatialLabs Edition, enabling industry-leading glasses-free stereoscopic 3D gaming," said Jerry Kao, Co-COO, Acer Inc. "By integrating our SpatialLabs technology with our Predator gaming laptops, we hope to create a new category of immersive gaming experiences."

Today we got information that AMD's upcoming Instinct MI300 will be allegedly available as an Accelerated Processing Unit (APU). AMD APUs are processors that combine CPU and GPU into a single package. AdoredTV managed to get ahold of a slide that indicates that AMD Instinct MI300 accelerator will also come as an APU option that combines Zen4 CPU cores and CDNA3 GPU accelerator in a single, large package. With technologies like 3D stacking, MCM design, and HBM memory, these Instinct APUs are positioned to be a high-density compute the product. At least six HBM dies are going to be placed in a package, with the APU itself being a socketed design.

The leaked slide from AdoredTV indicates that the first tapeout is complete by the end of the month (presumably this month), with the first silicon hitting AMD's labs in Q3 of 2022. If the silicon turns out functional, we could see these APUs available sometime in the first half of 2023. Below, you can see an illustration of the AMD Instinct MI300 GPU. The APU version will potentially be of the same size with Zen4 and CDNA3 cores spread around the package. As Instinct MI300 accelerator is supposed to use eight compute tiles, we could see different combinations of CPU/GPU tiles offered. As we await the launch of the next-generation accelerators, we are yet to see what SKUs AMD will bring.

An early retail unit of AMD's upcoming Ryzen 7 5800X3D has made its way to a Peruvian site called XanxoGamging, who put it through its paces in a few benchmarks, of which none so far are game related. The tests run on the upcoming CPU suggests that it's about as fast as a Ryzen 7 5700X in most single and multi-core tests. This should largely be down to the slower clock speeds of the Ryzen 7 5800X3D, which holds it back in these benchmarks compared to the older Ryzen 7 5800X.

However, it seems like some benchmarks can take advantage of the extra cache and the Ryzen 7 5800X3D is outperforming the 5800X in Blender, by a small margin. That said, the Cinebench R23 results are not overly impressive, neither are the CPU-Z or Geekbench 5 numbers. None of this is really unexpected though, especially as AMD has specifically mentioned that the 3D V-Cache doesn't bring additional performance to most software. XanxoGaming has promised more benchmarks and game tests tomorrow, but mentions that it feels strange losing performance in normal software due to the lower clocks, but that they hope the performance can be improved over time by an improved UEFI/AGESA.

WDC recently stated that certain materials were contaminated in late January at NAND Flash production lines in Yokkaichi and Kitakami, Japan which are joint ventures with Kioxia, according to TrendForce's investigations. Before this incident, TrendForce had forecast that the NAND Flash market will see a slight oversupply the entire year and average price from Q1 to Q2 will face downward pressure. However, the impact of WDC's material contamination issue is significant and Samsung's experience during the previous lockdown of Xi'an due to the pandemic has also retarded the magnitude of the NAND Flash price slump. Therefore, the Q1 price drop will diminish to 5~10%. In addition, according to TrendForce, the combined WDC/Kioxia NAND Flash market share in the 3Q21 was as high as 32.5%. The consequences of this latest incident may push the price of NAND Flash in Q2 to spike 5~10%.

The contaminated products in this incident are concentrated in 3D NAND (BICS) with an initial estimate of 6.5exabytes (approximately 6,500M GB) affected. According to TrendForce, damaged bits account for 13% of the group's output in 1Q22 and approximately 3% of the total output for the year. The normal production schedule for the entire line has yet to be confirmed. It is worth noting that the damages announced by WDC likely do not account for total losses stemming for this event and the number of damaged Kioxia parts has not been aggregated, so the total number of affected bits may increase further.

AMD's Ryzen 7000 series of desktop processors based on the novel Zen 4 core architecture are scheduled to arrive in the second half of 2022. While we are not sure just how big the architectural differences will be going from Zen 3 (with or without 3D V-cache) to the new Zen 4 core, we have some leaked information that confirms the existence of two SKUs that reveal additional details about the processor configuration. In the MilkyWay@Home project, aiming to create a model of the Milky Way galaxy by utilizing countless PCs across the globe, we found two next-generation Ryzen 7000 SKUs. The MilkyWay@Home project isn't a benchmark. However, it is a valuable reference where the next generation processors appeared.

First in line is the 100-000000666-21_N CPU, a codename for an eight-core, sixteen-threaded design. This model should correspond to the AMD Ryzen 7 7800X CPU, a successor to the Ryzen 7 5800X model. Next in line is the 100-000000665-21_N CPU with 16 cores and 32 threads, a successor to the Ryzen 9 5950X named Ryzen 9 7950X. One important thing to note is that these new CPUs feature different level two (L2) cache configurations. With the previous generation 5000 series "Vermeer" processors, the L2 cache was locked at 512 KB per core. However, according to today's leak, the upgraded Zen 4 IP will bring 1024 KB of L2 cache per core, doubling the cache size at one of the fastest levels.

As the year ends, one of the biggest consumer trade shows, CES, is on the horizon, and manufacturers are ready to present the work that will become real throughout the year. AMD will offer a keynote at the CES 2022 press conference, and we expect to hear more about the upcoming Zen3 processors with 3D V-cache stacked in them. However, what is interesting is that we may listen to more details about Zen4 core. In an exclusive interview conducted by Antony Leather, Forbes contributor and the person behind CrazyTechLab, AMD CTO Mark Papermaster started the hype machine by sharing that AMD will announce some Zen4 core details at the CES 2022 conference.

AMD CTO Mark PapermasterWith regards to the upcoming generation - I point to CES in January. We're excited to be revealing some additional details on our new product launches that will deliver phenomenal experiences and as we've said, later in the year as it progresses we'll share more detail on Zen 4 with some mentioned at CES and more announcements on it over the course of 2022. It will be a very exciting year for AMD.

Demand for NAND Flash products will undergo a noticeable and cyclical downward correction in 1Q22 as major smartphone brands wind down their procurement activities for the peak season and ODMs prepare for the New Year holidays, according to TrendForce's latest investigations. As such, the NAND Flash market will remain in an oversupply situation, with prices continuing to undergo downward corrections accordingly. However, PC OEMs have been reinstating certain orders for client SSDs since early November in response to improvements in the supply of upstream semiconductor materials. By fulfilling these orders, suppliers are able to keep their inventory level relatively low, meaning they are not under as much pressure as previously expected to reduce inventory by lowering prices. Taking these factors into account, TrendForce expects NAND Flash ASP to undergo a 10-15% QoQ decline in 1Q22, during which NAND Flash prices will experience the most noticeable declines compared to the other quarters in 2022.

Regarding the price trend of NAND Flash products across the whole 2021, TrendForce further indicates that suppliers have actively transitioned their output to higher-layer technologies, resulting in a bit supply growth that noticeably outpaces demand, though the tight supply of components such as controller ICs and PMICs has constrained the production of NAND Flash end-products. Hence, the decline in contract prices of NAND Flash products has not been as severe as previously expected. Moving ahead to 2022, however, the supply of relevant components is expected to gradually improve, so the market for various NAND Flash products will also likely shift towards a noticeable oversupply. As a result, prices of NAND Flash products will steadily decline before the arrival of the peak season in 3Q22.

Synopsys, Inc. today announced the industry's first complete HBM3 IP solution, including controller, PHY, and verification IP for 2.5D multi-die package systems. HBM3 technology helps designers meet essential high-bandwidth and low-power memory requirements for system-on-chip (SoC) designs targeting high-performance computing, AI and graphics applications. Synopsys' DesignWare HBM3 Controller and PHY IP, built on silicon-proven HBM2E IP, leverage Synopsys' interposer expertise to provide a low-risk solution that enables high memory bandwidth at up to 921 GB/s.

The Synopsys verification solution, including Verification IP with built-in coverage and verification plans, off-the-shelf HBM3 memory models for ZeBu emulation, and HAPS prototyping system, accelerates verification from HBM3 IP to SoCs. To accelerate development of HBM3 system designs, Synopsys' 3DIC Compiler multi-die design platform provides a fully integrated architectural exploration, implementation and system-level analysis solution.

NVIDIA (NASDAQ: NVDA) today reported record revenue for the second quarter ended August 1, 2021, of $6.51 billion, up 68 percent from a year earlier and up 15 percent from the previous quarter, with record revenue from the company's Gaming, Data Center and Professional Visualization platforms. GAAP earnings per diluted share for the quarter were $0.94, up 276 percent from a year ago and up 24 percent from the previous quarter. Non-GAAP earnings per diluted share were $1.04, up 89 percent from a year ago and up 14 percent from the previous quarter.

"NVIDIA's pioneering work in accelerated computing continues to advance graphics, scientific computing and AI," said Jensen Huang, founder and CEO of NVIDIA. "Enabled by the NVIDIA platform, developers are creating the most impactful technologies of our time - from natural language understanding and recommender systems, to autonomous vehicles and logistic centers, to digital biology and climate science, to metaverse worlds that obey the laws of physics.

The Semiconductor Industry Association (SIA) today announced Jensen Huang, founder and CEO of NVIDIA and a trailblazer in building accelerated computing platforms, is the 2021 recipient of the industry's highest honor, the Robert N. Noyce Award. SIA presents the Noyce Award annually in recognition of a leader who has made outstanding contributions to the semiconductor industry in technology or public policy. Huang will accept the award at the SIA Awards Dinner on Nov. 18, 2021.

"Jensen Huang's extraordinary vision and tireless execution have greatly strengthened our industry, revolutionized computing, and advanced artificial intelligence," said John Neuffer, SIA president and CEO. "Jensen's accomplishments have fueled countless innovations—from gaming to scientific computing to self-driving cars—and he continues to advance technologies that will transform our industry and the world. We're pleased to recognize Jensen with the 2021 Robert N. Noyce Award for his many achievements in advancing semiconductor technology."

The Linux Foundation, the nonprofit organization enabling mass innovation through open source, today announced an intent to form the Open 3D Foundation to accelerate developer collaboration on 3D game and simulation technology. The Open 3D Foundation will support open source projects that advance capabilities related to 3D graphics, rendering, authoring, and development. As the first project governed by the new foundation, Amazon Web Services, Inc. (AWS) is contributing an updated version of the Amazon Lumberyard game engine as the Open 3D Engine (O3DE), under the permissive Apache 2.0 license. The Open 3D Engine enables developers and content creators to build 3D experiences unencumbered by commercial terms and will provide the support and infrastructure of an open source community through forums, code repositories, and developer events. A developer preview of O3DE is available on GitHub today. For more information and/or to contribute, please visit: https://o3de.org

3D engines are used to create a range of virtual experiences, including games and simulations, by providing capabilities such as 3D rendering, content authoring tools, animation, physics systems, and asset processing. Many developers are seeking ways to build their intellectual property on top of an open source engine where the roadmap is highly visible, openly governed, and collaborative to the community as a whole. More developers look to be able to create or augment their current technological foundations with highly collaborative solutions that can be used in any development environment. O3DE introduces a new ecosystem for developers and content creators to innovate, build, share, and distribute immersive 3D worlds that will inspire their users with rich experiences that bring the imaginations of their creators to life.

Intel's upcoming Ponte Vecchio graphics card is set to be the company's most powerful processor ever designed, and the chip is indeed looking like an engineering marvel. From Intel's previous teasers, we have learned that Ponte Vecchio is built using 47 "magical tiles" or 47 dies which are responsible either for computing elements, Rambo Cache, Xe links, or something else. Today, we are getting a new piece of information coming from Igor's LAB, regarding the Ponte Vecchio and some of its design choices. For starters, the GPU will be a heterogeneous design that consists out of many different nodes. Some parts of the GPU will be manufactured on Intel's 10 nm SuperFin and 7 nm technologies, while others will use TSMC's 7 nm and 5 nm nodes. The smaller and more efficient nodes will probably be used for computing elements. Everything will be held together by Intel's EMIB and Foveros 3D packaging.

Next up, we have information that this massive Intel processor will be accountable for around 600 Watts of heat output, which is a lot to cool. That is why in the leaked renders, we see that Intel envisioned these processors to be liquid-cooled, which would make the cooling much easier and much more efficient compared to air cooling of such a high heat output. Another interesting thing is that the Ponte Vecchio is designed to fit inside OAM (OCP Accelerator Module) form factor, an alternative to the regular PCIe-based accelerators in data centers. OAM is used primarily by hyper scalers like Facebook, Amazon, Google, etc., so we imagine that Intel already knows its customers before the product even hits the market.

AMD via its official YouTube has shared a video that goes into slightly more detail on their usage of V-Cache on the upcoming Zen 3+ CPUs. Firstly demoed to the public on AMD's Computex 2021 event, the 3D V-Cache leverages TSMC's SoIC stacking technology, which enables silicon developments along the Z axis, instead of the more usual footprint increase along the X axis. The added 3D V-Cache, which was shown in Computex as being deployed in a prototype Ryzen 9 5900X 12-core CPU, adds 64 MB of L3 cache to each CCX (the up-to-eight-cores core complex on AMD's latest Zen design), basically tripling the amount of L3 cache available for the CPU. This, in turn, was shown to increase FPS in games quite substantially (somewhere around 15%), as games in particular are sensitive to this type of CPU resources.

The added information explains that there is no usage of microbumps - instead, there is a perfect alignment between the bottom layer (with the CCX) and the top layer (the L3 cache) which enables the bonding process to occur naturally via the TSVs (Through Silicon Vias) already present in the silicon, in a zero-gap manner, between both halves of the CPU-cache sandwich. To enable this, AMD flipped the CCX upside down (the core complex now faces the bottom of the chip, instead of the top), shaved 95% of the silicon on top of the upside-down core complexes, and then attaches the 3D V-Cache chips on top of this formation. This also has the added bonus of decreasing the distance between the L3 cache and the CCX (the distance between both in the Z axis is around 1,000 times smaller than if the L3 cache was deployed in the classical X axis), which decreases power consumption, temperatures, and latency, allowing for further increases to system performance. Look after the break for the full video.

AMD is in a constant process of processor development, and there are always new technologies on the horizon. Back in March of 2020, the company has revealed that it is working on new X3D packaging technology, that integrated both 2.5D and 3D approaches to packing semiconductor dies together as tightly as possible. Today, we are finally getting some more information about the X3D technology, as we have the first codename of the processor that is featuring this advanced packaging technology. According to David Schor, we have learned that AMD is working on a CPU that uses X3D tech with stacked dies, and it is called Milan-X.

The Milan-X CPU is AMD's upcoming product designed for data center usage. The rumors suggest that the CPU is designed for heavy bandwidth and presumably a lot of computing power. According to ExecutableFix, the CPU uses a Genesis-IO die to power the connectivity, which is an IO die from EPYC Zen 3 processors. While this solution is in the works, we don't know the exact launch date of the processor. However, we could hear more about it in AMD's virtual keynote at Computex 2021. For now, take this rumor with a grain of salt.