TrendForce's latest industry report on AI servers reveals that high demand for advanced AI servers from major CSPs and brand clients is expected to continue in 2024. Meanwhile, TSMC, SK hynix, Samsung, and Micron's gradual production expansion has significantly eased shortages in 2Q24. Consequently, the lead time for NVIDIA's flagship H100 solution has decreased from the previous 40-50 weeks to less than 16 weeks.

TrendForce estimates that AI server shipments in the second quarter will increase by nearly 20% QoQ, and has revised the annual shipment forecast up to 1.67 million units—marking a 41.5% YoY growth.

Today, ASML Holding NV (ASML) has published its 2024 second-quarter results.

• Q2 total net sales of €6.2 billion, gross margin of 51.5%, net income of €1.6 billion
• Quarterly net bookings in Q2 of €5.6 billion of which €2.5 billion is EUV
• ASML expects Q3 2024 total net sales between €6.7 billion and €7.3 billion and a gross margin between 50% and 51%

CEO statement and outlook
"Our second-quarter total net sales came in at €6.2 billion, at the high-end of our guidance, with a gross margin of 51.5% which is above guidance, both primarily driven by more immersion systems sales. In line with previous quarters, overall semiconductor inventory levels continue to improve, and we also see further improvement in litho tool utilization levels at both Logic and Memory customers. While there are still uncertainties in the market, primarily driven by the macro environment, we expect industry recovery to continue in the second half of the year. We expect third-quarter total net sales between €6.7 billion and €7.3 billion with a gross margin between 50% and 51%. ASML expects R&D costs of around €1,100 million and SG&A costs of around €295 million. Our outlook for the full year 2024 remains unchanged. We see 2024 as a transition year with continued investments in both capacity ramp and technology. We currently see strong developments in AI, driving most of the industry recovery and growth, ahead of other market segments," said ASML President and Chief Executive Officer Christophe Fouquet.

The much-anticipated revolution in AI-powered personal computing seems to be off to a slower start than expected. Qualcomm's Snapdragon X CPUs, touted as game-changers in the AI PC market, have struggled to gain significant traction since their launch. Recent data from PassMark, a popular benchmarking software, reveals that Snapdragon X CPUs account for a mere 0.3% of submissions in the past 30 days. This is a massive contrast to the 99.7% share held by traditional x86 processors from Intel and AMD, which raises questions about the immediate future of ARM-based PCs. The underwhelming adoption comes despite bold predictions from industry leaders. Qualcomm CEO Cristiano Amon had projected that ARM-based CPUs could capture up to 50% of the Windows PC market by 2029. Similarly, ARM's CEO anticipated a shift away from x86's long-standing dominance.

However, it turns out that these PCs are primarily bought for the battery life, not their AI capabilities. Of course, it's premature to declare Arm's Windows venture a failure. The AI PC market is still in its infancy, and upcoming mid-tier laptops featuring Snapdragon X Elite CPUs could boost adoption rates. A lot of time still needs to pass before the volume of these PCs reaches millions of units shipped by x86 makers. The true test will come with the launch of AMD's Ryzen AI 300 and Intel's Lunar Lake CPUs, providing a clearer picture of how ARM-based options compare in AI performance. As the AI PC landscape evolves, Qualcomm faces mounting pressure. NVIDIA's anticipated entry into the market and significant performance improvements in next-generation x86 processors from Intel and AMD pose a massive challenge. The coming months will be crucial in determining whether Snapdragon X CPUs can live up to their initial hype and carve out a significant place in the AI PC ecosystem.

The city of Las Vegas late last year added another attraction to its town: the Sphere. The Sphere is a 1.2 million pixel outdoor display venue famous for its massive size and inner 18,600-seat auditorium. The auditorium space is a feat of its own with features like a 16x16 resolution wraparound interior LED screen, speakers with beamforming and wave field synthesis technologies, and 4D physical effects. However, we have recently found out that NVIDIA GPUs power the Sphere. And not only a handful of them, as 150 NVIDIA RTX A6000 power the Sphere and its 1.2 million outside pixels spread on 54,000 m², as well as 16 of 16K inner displays with a total output of 2.1 billion pixels. Interestingly, the 150 NVIDIA RTX A6000 have a combined output cable number of 600 DisplayPort 1.4a ports.

With each card having 48 GB of memory, that equals to 7.2 TB of GDDR6 ECC memory in the total system. With the Sphere being a $2.3 billion project, it is expected to have an infotainment system capable of driving the massive venue. And it certainly delivers on that. Only a handful of cards powers most massive media projects, but this scale is something we see for the first time in non-AI processing systems. The only scale we are used to today is massive thousand-GPU clusters used for AI processing, so seeing a different and interesting application is refreshing.

Graphcore today announced that the company has been acquired by SoftBank Group Corp. Under the deal, Graphcore becomes a wholly owned subsidiary of SoftBank and will continue to operate under the Graphcore name.

"This is a tremendous endorsement of our team and their ability to build truly transformative AI technologies at scale, as well as a great outcome for our company," said Graphcore co-founder and CEO Nigel Toon. "Demand for AI compute is vast and continues to grow. There remains much to do to improve efficiency, resilience, and computational power to unlock the full potential of AI. In SoftBank, we have a partner that can enable the Graphcore team to redefine the landscape for AI technology."

AMD reportedly plans to incorporate glass substrates into its high-performance system-in-packages (SiPs) sometimes between 2025 and 2026. Glass substrates offer several advantages over traditional organic substrates, including superior flatness, thermal properties, and mechanical strength. These characteristics make them well-suited for advanced SiPs containing multiple chiplets, especially in data center applications where performance and durability are critical. The adoption of glass substrates aligns with the industry's broader trend towards more complex chip designs. As leading-edge process technologies become increasingly expensive and yield gains diminish, manufacturers turn to multi-chiplet designs to improve performance. AMD's current EPYC server processors already incorporate up to 13 chiplets, while its Instinct AI accelerators feature 22 pieces of silicon. A more extreme testament is Intel's Ponte Vecchio, which utilized 63 tiles in a single package.

Glass substrates could enable AMD to create even more complex designs without relying on costly interposers, potentially reducing overall production expenses. This technology could further boost the performance of AI and HPC accelerators, which are a growing market and require constant innovation. The glass substrate market is heating up, with major players like Intel, Samsung, and LG Innotek also investing heavily in this technology. Market projections suggest explosive growth, from $23 million in 2024 to $4.2 billion by 2034. Last year, Intel committed to investing up to 1.3 trillion Won (almost one billion USD) to start applying glass substrates to its processors by 2028. Everything suggests that glass substrates are the future of chip design, and we await to see first high-volume production designs.

According to a recent leak from Golden Pig on Weibo, AMD is gearing up to introduce the Ryzen 7 8745HS, a modified version of the existing Ryzen 7 8845HS APU. The key difference in this new chip lies in its neural processing capabilities. While the 8845HS boasts AMD's XDNA-based NPU (Neural Processing Unit), the upcoming 8745HS is rumored to have this feature disabled. Specifications for the 8745HS are expected to closely mirror its predecessor, featuring eight Zen 4 cores, 16 threads, and a configurable TDP range of 35-54 W. The chip will likely retain the Radeon 780M integrated GPU with 12 Compute Units. However, it is possible that AMD might introduce slight clock speed reductions to differentiate the new model further.

It is also worth pointing out that Hawk Point generation is not Copilot+ certified due to first-generation XDNA NPU being only 16 TOPS out of 40 TOPS required, so having an NPU doesn't help AMD advertise these processors as Copilot+ ready. The success of this new variant will largely depend on its pricing and adoption by laptop/mobile OEMs. Without the NPU, the 8745HS could offer a more budget-friendly option for users who don't require extensive local AI processing capabilities. After all, AI workloads remain a niche segment in consumer computing, and many users may find the 8745HS an attractive alternative if pricing is reduced, especially given the availability of cloud-based AI tools.

Taiwanese semiconductor giant TSMC is reportedly planning to increase its wafer prices by up to 10% in 2025, according to a Morgan Stanley note cited by investor Eric Jhonsa. The move comes as demand for cutting-edge processors in smartphones, PCs, AI accelerators, and HPC continues to surge. Industry insiders reveal that TSMC's state-of-the-art 4 nm and 5 nm nodes, used for AI and HPC customers such as AMD, NVIDIA, and Intel, could see up to 10% price hikes. This increase would push the cost of 4 nm-class wafers from $18,000 to approximately $20,000, representing a significant 25% rise since early 2021 for some clients and an 11% rise from the last price hike. Talks about price hikes with major smartphone manufacturers like Apple have proven challenging, but there are indications that modest price increases are being accepted across the industry. Morgan Stanley analysts project a 4% average selling price increase for 3 nm wafers in 2025, which are currently priced at $20,000 or more per wafer.

Mature nodes like 16 nm are unlikely to see price increases due to sufficient capacity. However, TSMC is signaling potential shortages in leading-edge capacity to encourage customers to secure their allocations. Adding to the industry's challenges, advanced chip-on-wafer-on-substrate (CoWoS) packaging prices are expected to rise by 20% over the next two years, following previous increases in 2022 and 2023. TSMC aims to boost its gross margin to 53-54% by 2025, anticipating that customers will absorb these additional costs. The impact of these price hikes on end-user products remains uncertain. Competing foundries like Intel and Samsung may seize this opportunity to offer more competitive pricing, potentially prompting some chip designers to consider alternative manufacturing options. Additionally, TSMC's customers could reportedly be unable to secure their capacity allocation without "appreciating TSMC's value."

AMD today announced the signing of a definitive agreement to acquire Silo AI, the largest private AI lab in Europe, in an all-cash transaction valued at approximately $665 million. The agreement represents another significant step in the company's strategy to deliver end-to-end AI solutions based on open standards and in strong partnership with the global AI ecosystem. The Silo AI team consists of world-class AI scientists and engineers with extensive experience developing tailored AI models, platforms and solutions for leading enterprises spanning cloud, embedded and endpoint computing markets.

Silo AI CEO and co-founder Peter Sarlin will continue to lead the Silo AI team as part of the AMD Artificial Intelligence Group, reporting to AMD senior vice president Vamsi Boppana. The acquisition is expected to close in the second half of 2024.

Samsung Electronics today announced its all-new Galaxy Z Fold6 and Galaxy Z Flip6, along with Galaxy Buds3 and Galaxy Buds3 Pro at Galaxy Unpacked in Paris.

Earlier this year, Samsung ushered in the era of mobile AI through the power of Galaxy AI. With the introduction of the new Galaxy Z series, Samsung is opening the next chapter of Galaxy AI by leveraging its most versatile and flexible form factor perfectly designed to enable a range of unique mobile experiences. Whether using Galaxy Z Fold's large screen, Galaxy Z Flip's FlexWindow or making the most of the iconic FlexMode, Galaxy Z Fold6 and Flip6 will provide more opportunities to maximize AI capabilities. Built on the foundation of Samsung's history of form factor innovation, Galaxy AI uses powerful, intelligent, and durable foldable experience to accelerate a new era of communication, productivity, and creativity.

The PC market gathered momentum in Q2 2024, with worldwide shipments of desktops and notebooks up 3.4% year-on-year, reaching 62.8 million units. Shipments of notebooks (including mobile workstations) hit 50 million units, growing 4%. Desktops (including desktop workstations), which constitute 20% of the total PC market, experienced a slight 1% growth, totaling 12.8 million units. The stage is now set for accelerated growth as the refresh cycle driven by the Windows 11 transition and AI PC adoption ramps up over the next four quarters.

"The PC industry is going from strength to strength with a third consecutive quarter of growth," said Ishan Dutt, Principal Analyst at Canalys. "The market turnaround is coinciding with exciting announcements from vendors and chipset manufacturers as their AI PC roadmaps transition from promise to reality. The quarter culminated with the launch of the first Copilot+ PCs powered by Snapdragon processors and more clarity around Apple's AI strategy with the announcement of the Apple Intelligence suite of features for Mac, iPad and iPhone. Beyond these innovations, the market will start to benefit even more from its biggest tailwind - a ramp-up in PC demand driven by the Windows 11 refresh cycle. The vast majority of channel partners surveyed by Canalys in June indicated that Windows 10 end-of-life is likely to impact customer refresh plans most in either the second half of 2024 or the first half of 2025, suggesting that shipment growth will only gather steam in upcoming quarters."

CPUID this week released the latest version of CPU-Z, and its change-log confirms the core-configurations of upcoming AMD Ryzen AI 300-series "Strix Point" processor SKUs. On paper, "Strix Point" packs a 12-core CPU based on the latest "Zen 5" microarchitecture, but there's more to this number. We've known since June 2024 that the chip has a heterogeneous multicore configuration of four full-sized "Zen 5" cores, and eight compacted "Zen 5c" cores. Only the "Zen 5" cores can reach the maximum boost frequencies rated for the chip, while the "Zen 5c" cores go a few notches above the base frequency, although it's expected that the gap in boost frequencies between the two core types is expected to slightly narrow compared to that between the "Zen 4" and "Zen 4c" cores in chips such as the "Phoenix 2."

The series is led by the AMD Ryzen AI 9 HX 375, an enthusiast segment chip that maxes out all 12 cores on the chip—that's 4x "Zen 5" and 8x "Zen 5c." This model is closely followed by the Ryzen AI 9 365, which AMD marked in its presentations as being simply a 10-core/20-thread chip. We're now learning that it has 4x "Zen 5" and 6x "Zen 5c," meaning that AMD hasn't touched the counts of its faster "Zen 5" cores. It's important to note here that "Zen 5c" is not an E-core. It supports SMT, and at base frequency, it has an identical IPC to "Zen 5." It also supports the entire ISA that "Zen 5" does.

The recent launch of Copilot+ PCs, a collaboration between Microsoft and Qualcomm, has taken an unexpected turn in the market. While these devices were promoted for their artificial intelligence capabilities, a Bloomberg report reveals that consumers are primarily drawn to them for their impressive battery life. The Snapdragon X-powered Copilot+ PCs have made a significant impact, securing 20% of global PC sales during their launch week. However, industry analyst Avi Greengart points out that the extended battery life, not the AI features, is driving these sales. Microsoft introduced three AI-powered features exclusive to these PCs: Cocreator, Windows Studio Effects, and Live Captions with Translation. Despite these innovations, many users find these features non-essential for daily use. The delay of the anticipated Recall feature due to privacy concerns has further dampened enthusiasm for the AI aspects of these devices.

The slow reception of on-device AI capabilities extends beyond consumer preferences to the software industry. Major companies like Adobe, Salesforce, and SentinelOne declined Microsoft's request to optimize their apps for the new hardware, citing resource constraints and the limited market share of AI-capable PCs. Gregor Steward, SentinelOne's VP for AI, suggests it could take years before AI PCs are widespread enough to justify app optimization. Analysts project that by 2028, only 40% of new computers will be AI-capable. Despite these challenges, Qualcomm remains optimistic about the future of AI PCs. While the concept may currently be more on the marketing side, the introduction of Arm-based Windows laptops offers a welcome alternative to the Intel-AMD duopoly. As the technology evolves and adoption increases, on-device AI features may become more prevalent and useful. The imminent arrival of AMD Ryzen AI 300 series and Intel Lunar Lake chips promises to expand the Copilot+ PC space further. For now, however, it appears that superior battery life remains the primary selling point for consumers.

Chinese GPU manufacturer Moore Threads has announced a significant upgrade to its KUAE data center server. The company now has the ability to connect up to 10,000 GPUs in a single cluster, marking a huge leap in its scale-out capabilities for artificial intelligence and high-performance computing applications. The enhanced KUAE server incorporates eight MTT S4000 GPUs, leveraging Moore Threads' proprietary MTLink interconnect technology. These GPUs, based on the MUSA architecture, each feature 128 tensor cores and 48 GB of GDDR6 memory, delivering a bandwidth of 768 GB/s. While the full performance metrics of a 10,000-GPU cluster remain undisclosed, the sheer scale of 1,280,000 tensor cores suggests decent computing potential. Moore Threads' GPUs currently lag behind NVIDIA's GPU offerings in terms of performance. However, the company claims its MTT S4000 remains competitive against certain NVIDIA models, particularly in large language model training and inference tasks.

The Chinese company is facing significant challenges due to its inclusion on the U.S. Department of Commerce's Entity List, restricting access to advanced manufacturing processes. Despite these obstacles, the firm has secured partnerships with major Chinese state-run telecom operators and technology companies, focusing on developing new computing cluster projects. A recent financing round raised approximately $343.7 million will help Moore Threads' ambitious expansion plans. However, limited access to cutting-edge semiconductor fabrication technologies may constrain the company's future growth. Nonetheless, creating a scale-out server infrastructure with up to 10,000 GPUs is vital for LLM training and inference, especially as Chinese AI labs catch up to Western labs in terms of the performance of their AI models.

Apparently the AMD "Strix Halo" processor is real, and it's large. The chip is designed to square off against the likes of the Apple M3 Pro and M3 Max, in letting ultraportable notebooks have powerful graphics performance. A chiplet-based processor, not unlike the desktop socketed "Raphael," and mobile BGA "Dragon Range," the "Strix Halo" processor consists of one or two CCDs containing CPU cores, wired to a large die, that's technically the cIOD (client I/O die), but containing an oversized iGPU, and an NPU. The point behind "Strix Halo" is to eliminate the need for a performance-segment discrete GPU, and conserve its PCB footprint.

According to leaks by Harukaze5719, a reliable source with AMD leaks, "Strix Halo" comes in a BGA package dubbed FP11, measuring 37.5 mm x 45 mm, which is significantly larger than the 25 mm x 40 mm size of the FP8 BGA package that the regular "Strix Point," "Hawk Point," and "Phoenix" mobile processors are built on. It is larger in area than the 40 mm x 40 mm FL1 BGA package of "Dragon Range" and upcoming "Fire Range" gaming notebook processors. "Strix Halo" features one or two of the same 4 nm "Zen 5" CCDs featured on the "Granite Ridge" desktop and "Fire Range" mobile processors, but connected to a much larger I/O die, as we mentioned.

Samsung Electronics, a world leader in advanced semiconductor technology, today announced that it will provide turnkey semiconductor solutions using the 2-nanometer (nm) foundry process and the advanced 2.5D packaging technology Interposer-Cube S (I-Cube S) to Preferred Networks, a leading Japanese AI company.

By leveraging Samsung's leading-edge foundry and advanced packaging products, Preferred Networks aims to develop powerful AI accelerators that meet the ever-growing demand for computing power driven by generative AI.

Leading provider of advanced AI solutions AAEON (Stock Code: 6579), has released the inaugural offering of its AI Inference Server product line, the MAXER-2100. The MAXER-2100 is a 2U Rackmount AI inference server powered by the Intel Core i9-13900 Processor, designed to meet high-performance computing needs.
The MAXER-2100 is also able to support both 12th and 13th Generation Intel Core LGA 1700 socket-type CPUs, up to 125 W, and features an integrated NVIDIA GeForce RTX 4080 SUPER GPU. While the product's default comes with the NVIDIA GeForce RTX 4080 SUPER, it is also compatible with and an NVIDIA-Certified Edge System for both the NVIDIA L4 Tensor Core and NVIDIA RTX 6000 Ada GPUs.

Given the MAXER-2100 is equipped with both a high-performance CPU and industry-leading GPU, a key feature highlighted by AAEON upon the product's launch is its capacity to execute complex AI algorithms and datasets, process multiple high-definition video streams simultaneously, and utilize machine learning to refine large language models (LLMs) and inferencing models.

Just a few weeks ago, AMD invited us to Barcelona as part of a roundtable, to share their vision for the future of the company, and to get our feedback. On site, were prominent AMD leadership, including Phil Guido, Executive Vice President & Chief Commercial Officer and Jack Huynh, Senior VP & GM, Computing and Graphics Business Group. AMD is making changes in a big way to how they are approaching technology, shifting their focus from hardware development to emphasizing software, APIs, and AI experiences. Software is no longer just a complement to hardware; it's the core of modern technological ecosystems, and AMD is finally aligning its strategy accordingly.

The major difference between AMD and NVIDIA is that AMD is a hardware company that makes software on the side to support its hardware; while NVIDIA is a software company that designs hardware on the side to accelerate its software. This is about to change, as AMD is making a pivot toward software. They believe that they now have the full stack of computing hardware—all the way from CPUs, to AI accelerators, to GPUs, to FPGAs, to data-processing and even server architecture. The only frontier left for AMD is software.

When NVIDIA started preparing the H20 GPU for China, the company anticipated great demand from sanction-obeying GPUs. However, we now know precisely what the company makes from its Chinese venture: an astonishing $12 billion in take-home revenue. Due to the massive demand for NVIDIA GPUs, Chinese AI research labs are acquiring as many as they can get their hands on. According to a report from Financial Times, citing SemiAnalysis as its source, NVIDIA will sell over one million H20 GPUs in China. This number far outweighs the number of home-grown Huawei Ascend 910B accelerators that the Chinese companies plan to source, with numbers being "only" 550,000 Ascend 910B chips. While we don't know if Chinese semiconductor makers like SMIC are capable of producing more chips or if the demand isn't as high, we know why NVIDIA H20 chips are the primary target.

The Huawei Ascend 910B features Total Processing Performance (TPP), a metric developed by US Govt. to track GPU performance measuring TeraFLOPS times bit-length of over 5,000, while the NVIDIA H20 comes to 2,368 TPP, which is half of the Huawei accelerator. That is the performance on paper, where SemiAnalysis notes that the real-world performance is actually ahead for the H20 GPU due to better memory configuration of the GPU, including higher HBM3 memory bandwidth. All of this proves to be a better alternative than Ascend 910B accelerator, accounting for an estimate of over one million GPUs shipped this year in China. With an average price of $12,000 per NVIDIA H20 GPU, China's $12 billion revenue will undoubtedly help raise NVIDIA's 2024 profits even further.

Intel's upcoming Arrow Lake "S" Desktop and "HX" laptop CPUs are reported to launch without dedicated NPU hardware. NPUs will be limited to Arrow Lake-H/U and Lunar Lake chips, with Core Ultra 200V chips offering up to 48 TOPS of AI performance. Currently, AMD is the only manufacturer offering desktop chips with dedicated NPUs in their Ryzen 8000G "Hawk Point" series for the AM5 platform. However, according to Jaykihn, an active Intel-related leaker, Intel may be planning to incorporate NPUs in future Arrow Lake-S and Arrow Lake-HX refreshes.

The potential refresh could include an NPU within the SOC tile, possibly increasing the die size by 2.8 mm compared to current Arrow Lake designs. The package size is expected to remain unchanged, maintaining socket compatibility, however, motherboard manufacturers would need to enable Fast Voltage Mode (FVM) on VccSA rails to support the NPU functionality. While it's early to discuss an Arrow Lake refresh before the initial launch, this development could impact Intel's roadmap and the "AI PC" market segment. Also, it could have possible implications for the release schedule of future architectures like Panther Lake.

Intel very much does intend to make discrete gaming GPUs based on its Xe2 "Battlemage" graphics architecture, which made its debut with the Core Ultra 200V "Lunar Lake-MX" processor as an iGPU. With its next generation, Intel plans to capture an even bigger share of the gaming graphics market, both on the notebook and desktop platforms. "Battlemage" will be crucial for Intel, as it will be able to make its case with Microsoft and Sony for semi-custom chips, for their next-generation consoles. Intel has all pieces of the console SoC puzzle that AMD does. A Xe2 "Battlemage" discrete GPU sample, codenamed "Churchill Falls," has been spotted making its transit in and out of locations known for Intel SoC development, such as Bangalore in India, and Shanghai in China.

Such shipping manifests tend to be incredibly descriptive, and speak of an Arc "Battlemage" X3 and Arc "Battlemage" X4 SKUs, each with 448 execution units (EU), across 56 Xe cores. Assuming an Xe core continues to have 128 unified shaders in the "Battlemage" architecture, you're looking at 7,168 unified shaders for this GPU, a staggering 75% increase in just the numerical count of the shaders, and not accounting for IPC increase and other architecture-level features. The descriptions also speak of a 256-bit wide memory bus, although they don't specify memory type or speed. Given that at launch, the Arc A770 "Alchemist" was a 1440p-class GPU, we predict Intel might take a crack at a 4K-class GPU. Besides raster 3D performance, Intel is expected to significantly improve the ray tracing and AI performance of its Xe2 discrete GPUs, making them powerful options for creative professionals.

In 2016, TSMC developed and named its InFO FOWLP technology, and applied it to the A10 processor used in the iPhone 7. TrendForce points out that since then, OSAT providers have been striving to develop FOWLP and FOPLP technologies to offer more cost-effective packaging solutions.

Starting in the second quarter, chip companies like AMD have actively engaged with TSMC and OSAT providers to explore the use of FOPLP technology for chip packaging and helping drive industry interest in FOPLP. TrendForce observes that there are three main models for introducing FOPLP packaging technology: Firstly, OSAT providers transitioning from traditional methods of consumer IC packaging to FOPLP. Secondly, foundries and OSAT providers packaging AI GPUs that are transitioning 2.5D packaging from wafer level to panel level. Thirdly, panel makers who are packaging consumer ICs.

South Korean startup Panmnesia has unveiled an interesting solution to address the memory limitations of modern GPUs. The company has developed a low-latency Compute Express Link (CXL) IP that could help expand GPU memory with external add-in card. Current GPU-accelerated applications in AI and HPC are constrained by the set amount of memory built into GPUs. With data sizes growing by 3x yearly, GPU networks must keep getting larger just to fit the application in the local memory, benefiting latency and token generation. Panmnesia's proposed approach to fix this leverages the CXL protocol to expand GPU memory capacity using PCIe-connected DRAM or even SSDs. The company has overcome significant technical hurdles, including the absence of CXL logic fabric in GPUs and the limitations of existing unified virtual memory (UVM) systems.

At the heart of Panmnesia's solution is a CXL 3.1-compliant root complex with multiple root ports and a host bridge featuring a host-managed device memory (HDM) decoder. This sophisticated system effectively tricks the GPU's memory subsystem into treating PCIe-connected memory as native system memory. Extensive testing has demonstrated impressive results. Panmnesia's CXL solution, CXL-Opt, achieved two-digit nanosecond round-trip latency, significantly outperforming both UVM and earlier CXL prototypes. In GPU kernel execution tests, CXL-Opt showed execution times up to 3.22 times faster than UVM. Older CXL memory extenders recorded around 250 nanoseconds round trip latency, with CXL-Opt potentially achieving less than 80 nanoseconds. As with CXL, the problem is usually that the memory pools add up latency and performance degrades, while these CXL extenders tend to add to the cost model as well. However, the Panmnesia CXL-Opt could find a use case, and we are waiting to see if anyone adopts this in their infrastructure.Below are some benchmarks by Panmnesia, as well as the architecture of the CXL-Opt.

Opera GX, the browser for gamers, is bringing a significant update to the browser's built-in AI, Aria. This update provides users with the latest AI features that Opera has been releasing as part of their experimental AI Feature Drops program in the Developer stream of the Opera One browser. The features that are arriving to Opera GX increase Aria's capabilities by introducing image generation and understanding, voice output, a chat summary option, and links to sources.

Image Generation and Voice Output
Images are crucial to today's web, so this Opera GX update places a strong focus on the visual. With this update, Aria is gaining the ability to turn text prompts and descriptions into unique images using the image generation model Imagen2 by Google. Aria identifies the user's intention to generate an image based on conversational prompts. They can also use the "regenerate" option to have Aria come up with a new image. Aria allows them to generate 30 images per day per user.

Intel's upcoming Core Ultra "Arrow Lake-S" desktop processor introduces a new socket, the LGA1851, alongside the new Intel 800-series desktop chipset. We now have some idea what the 151 additional pins on the new socket are used for, thanks to a leaked platform map on the ChipHell forums, discovered by HXL. Intel is expanding the number of PCIe lanes from the processor. It now puts out a total of 32 PCIe lanes.

From the 32 PCIe lanes put out by the "Arrow Lake-S" processor's system agent, 16 are meant for the PCI-Express 5.0 x16 PEG slot to be used for discrete graphics. Eight are used as chipset bus, technically DMI 4.0 x8 (these are eight lanes that operate at Gen 4 speed for 128 Gbps per direction of bandwidth). There are now not one, but two CPU-attached M.2 NVMe slots possible, just like on the AMD "Raphael" and "Granite Ridge" processors. What's interesting, though, is that not both are Gen 5. One of these is Gen 5 x4, while the other is Gen 4 x4.