TechInsights has identified CXMT's new 16 nm DRAM chips in Gloway DDR-6000 UDIMM modules, confirming advancement in the Chinese memory industry. The CXMT 16 Gb DDR5 chip measures 67 square millimeters with a density of 0.239 Gb per square millimeter. The G4 DRAM cells are 20 percent smaller than CXMT's previous G3 generation. This follows the company's progression from 23 nm (G1) and 18 nm (G2) nodes. Despite this advancement, CXMT remains approximately three years behind Samsung, SK Hynix, and Micron in manufacturing capabilities. The Hefei-based company achieved this production milestone under US sanctions restricting access to certain manufacturing equipment and materials, setting it back years in gaining production of advanced memory nodes.

TechInsights found these chips in commercially available memory modules, confirming CXMT's entry into DDR5 production. DDR5 technology is projected to be the primary DRAM standard through 2027. The three major DRAM manufacturers have been producing DDR5 through multiple generations, with DDR5 now reaching 10,000 MT/s speeds. This represents CXMT's first DDR5 DRAM product to reach the consumer market. The chips meet basic compatibility requirements for current DDR5 specifications, meaning that the Chinese memory manufacturing has achieved "1z" memory manufacturing on its soil. This marks the second major news for the Chinese semiconductor industry, right after TechInsights also confirmed that YMTC has started shipping 292-layer NAND Flash. With domestic demand for memory and storage projected to remain strong, we wonder if the supply will exceed demand and allow some left-over chips for worldwide usage.

According to a recent Citigroup analysis, CXMT, China's domestic memory chipmaker, is demonstrating significant progress in its DDR5 production yields. The company's DDR5 yield rates had reached approximately 80%, marking a substantial improvement from its initial 50% yields when production began. This progress builds on CXMT's experience with DDR4 manufacturing, where the company has achieved yields of around 90%. The company currently operates two fab facilities in Hefei, with Fab 1 dedicated to DDR4 production on 19 nm process technology and a 100,000 wafer per month capacity. Fab 2 focuses on DDR5 production using 17 nm technology, with a current capacity of 50,000 wafers per month. CXMT's DDR5 yields could improve further to approximately 90% by the end of 2025.

Despite these improvements, CXMT faces technological challenges compared to industry leaders. The company's current production process is 19 nm for DDR4 and 17 nm for DDR5, lagging behind competitors like Samsung and SK Hynix, which manufacture 12 nm DDR5 chips. This technology gap results in higher power consumption and less favorable form factors for CXMT's products. The company primarily targets domestic Chinese smartphone and computing OEM customers. Looking ahead, CXMT plans to expand its DDR5 and HBM capabilities, with a potential additional capacity of 50,000 wafers per month at Fab 2 in 2025, if market conditions prove favorable. The company is also making progress on HBM2 development, with customer sampling underway and low-volume production expected to begin in mid-2025.

The Biden administration is set to announce new, targeted restrictions on China's semiconductor industry, focusing primarily on emerging chip manufacturing equipment companies rather than broad industry-wide limitations. According to Bloomberg, these new restrictions are supposed to take effect on Monday. The new rules will specifically target two manufacturing facilities owned by Semiconductor Manufacturing International Corp. (SMIC) and will add select companies to the US Entity List, restricting their access to American technology. However, most of Huawei's suppliers can continue their operations, suggesting a more mild strategy. The restrictions will focus on over 100 emerging Chinese semiconductor equipment manufacturers, many of which receive government funding. These companies are developing tools intended to replace those currently supplied by industry leaders such as ASML, Applied Materials, and Tokyo Electron.

The moderated approach comes after significant lobbying efforts from American semiconductor companies, who argued that stricter restrictions could disadvantage them against international competitors. Major firms like Applied Materials, KLA, and Lam Research voiced concerns about losing market share to companies in Japan and the Netherlands, where similar but less stringent export controls are in place. Notably, Japanese companies like SUMCO are already seeing the revenue impacts of Chinese independence. Lastly, the restrictions will have a limited effect on China's memory chip sector. The new measures will not directly affect ChangXin Memory Technologies (CXMT), a significant Chinese DRAM manufacturer capable of producing high-bandwidth memory for AI applications.

In a bold move to circumvent US sanctions imposed on Chinese chipmakers, ChangXin Memory Technologies (CXMT) and Yangtze Memory Technologies (YMTC), leading Chinese suppliers of DRAM and NAND flash memory respectively, are pursuing distinct strategies to accelerate development despite US export restrictions. Sources at DigiTimes indicate that CXMT has commenced mass production of 18.5 nm process DRAM chips at its new plant in Hefei. By slightly exceeding the US limit of 18 nm, CXMT aims to increase capacity while technically complying with Commerce Department rules. The phase-one Hefei plant is nearly at full utilization, with monthly output reaching 100,000 wafers. The upcoming phase-two expansion, adding 40,000 monthly wafers by the end of 2024, could give CXMT 10% of total DRAM capacity at global scale. Moreover, CXMT plans to increase domestic sourcing for the new expansion significantly.

In contrast, YMTC's capacity growth faces constraints across the board after being added to the US Entity List. With imports of key equipment now halted, building up local supply chains for materials and tools has proven challenging. Despite R&D advances, including NAND flash with over 300 layers, YMTC has introduced new 120-layer products that intentionally fall under the US limit of 128. However, even these compliant chips await US approval for higher production. Looking ahead, while CXMT has carved a viable path around US restrictions, YMTC's capacity plans face ongoing obstacles. Still, through determined R&D efforts, including 232-layer and future 300+ layer NAND, YMTC aims to push China's semiconductor capabilities forward despite external headwinds.