Looking to challenge AMD's gaming CPU supremacy, Intel is reportedly developing Nova Lake processors with enhanced cache technology that could rival the popular 3D V-Cache found in X3D chips. According to leaker @Haze2K1, Intel plans to add "bLLC" (big Last Line Cache) to at least two Nova Lake models. This improved L3 cache is similar to AMD's 3D V-Cache, which has made X3D chips the top pick for enthusiast gamers since 2022. The new processors with bLLC will have 8 P-cores and 4 LP-E-Cores. One version will include 20 E-cores, while another will have 12 E-cores. Both are expected to keep a 125 W TDP rating.

Intel's bLLC technology already exists in Clearwater Forest server processors where local cache integrates into the base tile positioned beneath active tiles. This structural approach mirrors AMD's current 9000-series X3D design, where V-Cache attaches to the bottom of CPU dies—a significant improvement over earlier generations that placed cache on top, causing thermal issues and clock speed limitations. Yet, Intel said no to consumer plans for a technology similar to AMD's 3D V-Cache. In November 2024, Intel's Tech Communications Manager Florian Maislinger told YouTubers der8auer and Bens Hardware that they didn't plan such a desktop version. The Nova Lake-S family is set to hit the market in late 2026 or early 2027, with at least six desktop models using new LGA 1954 packaging. The lineup will start from the top-end Core Ultra 9 485K with 52 cores and 150 W TDP and go down to the basic Core Ultra 3 415K offering 12 cores at 125 W TDP.

Intel's presentation at the VLSI Symposium in Japan offered a detailed look at the upcoming Intel 18A process, which is set to enter mass production in the second half of 2025. This node combines Gate-All-Around transistors with the PowerVia backside power delivery network, resulting in a completely new metal stack architecture. By routing power through the rear of the die, Intel has been able to tighten interconnect pitches on critical layers while relaxing spacing on the top layer, improving yield and simplifying fabrication. In standardized power, performance, and area tests on an Arm core sub-block, Intel 18A demonstrated roughly 15% higher performance at the same power draw compared to Intel 3. When operating at 1.1 volts, clock speeds increase by up to 25% without incurring additional energy costs, and at around 0.75 volts, performance can rise by 18%, or power consumption can drop by nearly 40%.

Under the hood, the process features significant cell height reductions: performance‑tuned cells measure 180 nanometers tall, while high‑density designs sit at 160 nanometers, both smaller than their predecessors. The front‑side metal layers have been reduced from between 12 and 19 on Intel 3 to between 11 and 16 on Intel 18A, with three additional rear metal layers added for PowerVia support. Pitches on layers M1 through M10 have been tightened from as much as 60 nanometers down to 32 nanometers before easing again in the upper layers. Low-NA EUV exposure is used on layers M0 through M4, cutting the number of masks required by 44% and simplifying the manufacturing flow. Intel plans to debut 18A in its low‑power "Panther Lake" compute chiplet and the efficiency‑core‑only Clearwater Forest Xeon 7 family. A cost-optimized 17-layer variant, a balanced 21-layer option, and a performance-focused 22-layer configuration will address different market segments.

Intel's tale of financial difficulties has been told for many quarters now, and the company is slowly paving the way to profitability through workforce reduction, new aggressive product roadmaps, and, as of now, a 50% gross margin requirement before entering production. At Bank of America's global technology conference, Intel Products CEO Michelle Johnston Holthaus noted that CEO Lip-Bu Tan is "laser-focused on the fact that we need to get our gross margins back up above 50%." Explaining the reasoning behind this decision, MJH added that it is "something that we probably should have had before, but we have it now so that product doesn't move forward; you actually don't get engineers assigned to it if it's not 50% or higher gross margins moving forward."

Interestingly, this means that every new product will now go into evaluation of profitability first, unlike the "build it and they will (hopefully) come" philosophy, which cost Intel many billions of R&D just to enter new markets without a solid financial plan. MJH also added about 50% gross margin expectation:" So I think our future products can all get there, I think really what it comes down to is you have to have a lot of discipline in your product life cycle planning to build products from day one that hit that and so there's a lot of things that I talked about when we talked about Lip-Bu coming on board of getting our OpEx and our CapEx in line, getting the types of products that we're going to build in alignment, really understanding market and ASPs." This means that upcoming Panther Lake, 18A node HVM, Clearwater Forest Xeons, Xe3/Xe4 Arc GPUs, and Jaguar Shores AI accelerators all carry a gross margin of 50% or more, making them viable for Intel and sustainable in the long run.

Intel says its struggling Foundry division will finally break even in 2027, just as its advanced 14A process comes online. The announcement came during the J.P. Morgan Global Technology, Media & Communications Conference, where CFO David Zinsner outlined the plan to offset years of quarterly losses. Intel has been pouring billions of dollars into new fabs and equipment as it races to keep pace with TSMC and Samsung. Its first milestone is the 18A process, whose first product, codenamed Panther Lake, will arrive in client PCs late in 2025, with volume production following in 2026. Intel also plans to use 18A for its next Xeon "Clearwater Forest" server chips and offer it to a small set of external partners to prove the technology's readiness. "We have to start by using our own chips," Zinsner explained. "Once we show that Panther Lake and Clearwater Forest perform as expected, we'll see more interest from outside customers for 18A, 18A‑P, and then 14A."

He acknowledged that initial adoption is low, but expressed confidence that proven performance will drive committed volume. A key part of the strategy is the use of High‑NA EUV lithography at 14A. Zinsner admitted this will raise equipment costs at first, but he believes the improved transistor density and power efficiency will more than make up for the investment, boosting margins and factory utilization. Intel's path to break even also incorporates revenue from mature nodes such as Intel 16/12, advanced packaging services, and collaborations with UMC and Tower. Under its "smart capital" model, the company will balance internal wafer demand with third‑party work, maintaining flexibility and cost discipline. With a relatively modest external revenue target (for a cash-bleeding foundry), low to mid single‑digit billions per year, Intel Foundry aims to reach break‑even in 2027 and move into sustained profitability soon afterward. By 2027, Intel 14A node and ehnaced the 1.8 nm-class 18A-P(T) node will also complement these break-even efforts.

Intel has updated its 18A node website with the message, "Intel 18A is now ready for customer projects with the tape outs beginning in the first half of 2025: contact us for more information." The contact hyperlink includes an email where future customers can direct their questions to Intel. Designed as a turnaround node for Intel, 18A carries industry-leading features like SRAM density scaling comparable with TSMC's N2, 15% better performance per watt, and 30% better chip density vs. the Intel 3 process node used in Intel Xeon 6, as well as PowerVia backside-power delivery to increase transistor density.

Other features like RibbonFET are the first to replace FinFET transistors, making gate leakage a tighter control. Interestingly, Intel's first products to use the 18A node are client CPUs "Panther Lake" and "Clearwater Forest" Xeon CPUs for data centers. External Intel Foundry customers using the 18A node include Amazon's AWS, Microsoft for its internal silicon for Azure, and Broadcom exploring 18A-based designs. The process of gaining customers for advanced manufacturing is complex, as many existing Samsung/TSMC customers are not risking their capacity and contracts with established advanced silicon makers. However, if Intel's first few customers prove successful, many others could flock over to Intel's fabs as geopolitical tensions are questioning whether the current models of the semiconductor supply chain are feasible in the future. If US companies and startups decide to move with Intel for their chip manufacturing, Intel could experience a complete recovery.

Intel's data center business has experienced a lot of decline in recent years. Once the go-to choice for data center buildout, nowadays, Xeon processors have reached a 13-year low. According to SemiAnalysis analyst Sravan Kundojjala on X, the once mighty has fallen to a 13-year low number, less than 50% of its CPU sales in the peak observed in 2021. In a chart that is indexed to 2011 CPU volume, the analysis gathered from server volume and 10K fillings shows the decline that Intel has experienced in recent years. Following the 2021 peak, the volume of shipped CPUs has remained in free fall, reaching less than 50% of its once-dominant position. The main cause for this volume contraction is attributed to Intel's competitors gaining massive traction. AMD, with its EPYC CPUs, has been Intel's primary competitor, pushing the boundaries on CPU core count per socket and performance per watt, all at an attractive price point.

During a recent earnings call, Intel's interim c-CEO leadership admitted that Intel is still behind the competition with regard to performance, even with Granite Rapids and Clearwater Forest, which promised to be their advantage in the data center. "So I think it would not be unfathomable that I would put a data center product outside if that meant that I hit the right product, the right market window as well as the right performance for my customers," said Intel co-CEO Michelle Johnston Holthaus, adding that "Intel Foundry will need to earn my business every day, just as I need to earn the business of my customers." This confirms that the company is now dedicated to restoring its product leadership, even if its internal foundry is not doing okay. It will take some time before Intel CPU volume shipments recover, and with AMD executing well in data center, it is becoming a highly intense battle.

Intel has officially announced that its "Clearwater Forest" Xeon processor family will be arriving somewhere in the first half of 2026. During a recent earnings call, interim co-CEO—Michelle Johnston Holthaus—discussed Team Blue's product roadmap for 2025 and beyond: "this year is all about improving Intel Xeon's competitive position as we fight harder to close the gap to the competition. The ramp of Granite Rapids has been a good first step. We are also making good progress on Clearwater Forest, our first Intel 18A server product that we plan to launch in the first half of next year." Press outlets have (correctly) pointed out that Intel's "Clearwater Forest" Xeon processors were originally slated for release in 2025, so the company's executive branch has seemingly admitted—in a low-key manner—that their next-gen series is delayed. Industry whispers from last autumn posit that Team Blue foundries were struggling with their proprietary 18A (1.8 nm) node process—at the time, watchdogs predicted a postponement of "Clearwater Forest" server processors.

The original timetable had "Clearwater Forest" server CPUs arriving not long after the launch of Intel's latest line of "Sierra Forest" products—288-core models from the Xeon 6-series. The delay into 2026 could be beneficial—The Register proposes that "Xeons bristling with E-cores" have not found a large enough audience. Holthaus disclosed a similar sentiment (in the Q4 earnings call): "what we've seen is that's more of a niche market, and we haven't seen volume materialize there as fast as we expected." Despite rumors swirling around complications affecting chip manufacturing volumes, Intel's temporary co-leaders believe that things are going well. David Zinsner—Team Blue's CFO—stated: "18A has been an area of good progress...Like any new process, there have been ups and downs along the way, but overall, we are confident that we are delivering a competitive process." His colleague added: "as the first volume customer of Intel 18A, I see the progress that Intel Foundry is making on performance and yield, and I look forward to being in production in the second half, as we demonstrate the benefits of our world-class design."

Yesterday, Intel launched its Xeon 6 family of server processors based on P-cores manufactured on Intel 3 node. While the early reviews seem promising, Intel is preparing a more advanced generation of processors that will make or break its product and foundry leadership. Codenamed "Clearwater Forest," these CPUs are expected to be the first high-volume production chips based on the Intel 18A node. We have pictures of the five-tile Clearwater Forest processor thanks to Tom's Hardware. During the Enterprise Tech Tour event in Portland, Oregon, Tom's Hardware managed to take a picture of the complex Clearwater Forest design. With compute logic built on 18A, this CPU uses Intel's 3-T process technology, which serves as the foundation for the base die, marking its debut in this role. Compute dies are stacked on this base die, making the CPU building more complex but more flexible.

The Foveros Direct 3D and EMIB technologies enable large-scale integration on a package, achieving capabilities that previous monolithic single-chip designs could not deliver. Other technologies like RibbonFET and PowerVia will also be present for Clearwater Forest. If everything continues to advance according to plan, we expect to see this next-generation CPU sometime next year. However, it is crucial to note that if this CPU shows that the high-volume production of Intel 18A is viable, many Intel Foundry customers would be reassured that Intel can compete with TSMC and Samsung in producing high-performance silicon on advanced nodes at scale.

Intel today announced that its lead products on Intel 18A, Panther Lake (AI PC client processor) and Clearwater Forest (server processor), are out of the fab and have powered-on and booted operating systems. These milestones were achieved less than two quarters after tape-out, with both products on track to start production in 2025. The company also announced that the first external customer is expected to tape out on Intel 18A in the first half of next year.

"We are pioneering multiple systems foundry technologies for the AI era and delivering a full stack of innovation that's essential to the next generation of products for Intel and our foundry customers. We are encouraged by our progress and are working closely with customers to bring Intel 18A to market in 2025." -Kevin O'Buckley, Intel senior vice president and general manager of Foundry Services

Intel Corporation today reported second-quarter 2024 financial results. "Our Q2 financial performance was disappointing, even as we hit key product and process technology milestones. Second-half trends are more challenging than we previously expected, and we are leveraging our new operating model to take decisive actions that will improve operating and capital efficiencies while accelerating our IDM 2.0 transformation," said Pat Gelsinger, Intel CEO. "These actions, combined with the launch of Intel 18A next year to regain process technology leadership, will strengthen our position in the market, improve our profitability and create shareholder value."

"Second-quarter results were impacted by gross margin headwinds from the accelerated ramp of our AI PC product, higher than typical charges related to non-core businesses and the impact from unused capacity," said David Zinsner, Intel CFO. "By implementing our spending reductions, we are taking proactive steps to improve our profits and strengthen our balance sheet. We expect these actions to meaningfully improve liquidity and reduce our debt balance while enabling us to make the right investments to drive long-term value for shareholders."

Pat Gelsinger—CEO of Intel Corporation—happily revealed late last month, during an earnings call: "Clearwater Forest, our first Intel 18A part for servers has already gone into fab and Panther Lake for clients will be heading into Fab shortly." The former is positioned as the natural successor to Team Blue's many-times-delayed Xeon "Sierra Forest" (all E-Core) processor family. Intel's second generation E-core Xeon "Clearwater Forest" design is expected to launch in 2025, with a deployment of "Darkmont" efficiency-oriented cores. Official product roadmaps and patch notes have revealed basic "Clearwater Forest" information, but we have not seen many leaks. Bionic_Squash has a history of releasing strictly internal Intel presentation slides—Meteor Lake (MTL-S) desktop SKUs were uncovered last April.

Their latest discovery does not include any photo or documented evidence—Bionic_Squash's concise social media post stated: "Clearwater Forest uses 3D stacking with hybrid bonding." This claim points to the possible deployment of Foveros Direct advanced packaging—this technology was expected to be ready at some point within the second half of 2023, although a mid-December technology showcase implied that things were behind schedule. The fanciest "Clearwater Forest" Xeon processors could arrive with a maximum total of 288 E-core count (and 288 threads)—according to Wccftech analysis: "The CPU package is going to consist of a base tile on top of the interposer which is connected through a high-speed I/O, EMIB, and the cores will be sitting on the topmost layer...Foveros Direct technology will allow direct copper-to-copper bonding, enabling low resistance interconnects and around 10-micron bump pitches. Intel itself states that Foveros Direct will blur the boundary between where the wafer ends and the package begins."

Intel presented its next generation Xeon "Clearwater Forest" processor family during September's Innovation Event—their roadmap slide (see below) included other Birch Stream platform architecture options. Earlier this week, Team Blue's software engineers issued a Linux kernel patch that contains details pertaining to codenamed projects: Sierra Forest, Grand Ridge and the aforementioned Clearwater Forest. All E-Core Xeon "Sierra Forest" processors are expected to launch around the middle of 2024—this deployment of purely efficiency-oriented "Sierra Glen" (Atom Crestmont) cores in enterprise/server chip form will be a first for Intel. The Sierra Forest Xeon range has been delayed a couple of times; but some extra maturation time has granted a jump from an initial maximum 144 E-Core count up to 288. The latest patch notes provide an early look into Clearwater Forest's basic foundations—it seems to be Sierra Forest's direct successor.

The Intel Xeon "Granite Rapids" processor family is expected to hit retail just after a Sierra Forest product launch, but the former sports a very different internal configuration—an all "Redwood Cove" P-Core setup. Phoronix posits that Sierra Forest's groundwork is clearing the way for its natural successor: "Clearwater Forest is Intel's second generation E-core Xeon...Clearwater Forest should ship in 2025 while the open-source Intel Linux engineers begin in their driver support preparations and other hardware enablement well in advance of launch. With engineers already pushing Sierra Forest code into the Linux kernel and related key open-source projects like Clang and GCC since last year, their work on enabling Sierra Forest appears to be largely wrapping up and in turn the enablement is to begin for Clearwater Forest. Sent out...was the first Linux kernel patch for Sierra Forest. As usual, for the first patch it's quite basic and is just adding in the new model number for Clearwater Forest CPUs. Clear Water Forest has a model number of 0xDD (221). The patch also reaffirms that the 0xDD Clearwater Forest CPUs are using Atom Darkmont cores."